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LTC2203CUK#TR

Description
Analog to Digital Converters - ADC LTC2203 - 16-Bit, 25Msps ADCs
CategoryAnalog mixed-signal IC    converter   
File Size1MB,32 Pages
ManufacturerADI
Websitehttps://www.analog.com
Download Datasheet Parametric View All

LTC2203CUK#TR Overview

Analog to Digital Converters - ADC LTC2203 - 16-Bit, 25Msps ADCs

LTC2203CUK#TR Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerADI
package instructionHVQCCN,
Reach Compliance Codenot_compliant
ECCN code3A991.C.4
Maximum analog input voltage2.5 V
Minimum analog input voltage
Converter typeADC, PROPRIETARY METHOD
JESD-30 codeS-PQCC-N48
JESD-609 codee0
length7 mm
Maximum linear error (EL)0.0069%
Humidity sensitivity level1
Number of analog input channels1
Number of digits16
Number of functions1
Number of terminals48
Maximum operating temperature70 °C
Minimum operating temperature
Output bit codeOFFSET BINARY, 2\'S COMPLEMENT BINARY
Output formatPARALLEL, WORD
Package body materialPLASTIC/EPOXY
encapsulated codeHVQCCN
Package shapeSQUARE
Package formCHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)235
Certification statusNot Qualified
Sampling rate25 MHz
Sample and hold/Track and holdSAMPLE
Maximum seat height0.8 mm
Nominal supply voltage3.3 V
surface mountYES
technologyCMOS
Temperature levelCOMMERCIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
Maximum time at peak reflow temperature20
width7 mm
LTC2203/LTC2202
16-Bit, 25Msps/10Msps ADCs
FEATURES
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DESCRIPTION
The LTC
®
2203/LTC2202 are 25Msps/10Msps, sampling
16-bit A/D converters designed for digitizing high frequen-
cy, wide dynamic range signals with input frequencies up
to 380MHz. The input range of the ADC can be optimized
with the PGA front end.
The LTC2203/LTC2202 are perfect for demanding app-
lications, with AC performance that includes 81.6dB
SNR and 100dB spurious free dynamic range (SFDR).
Maximum DC specs include ±4LSB INL, ±1LSB DNL (no
missing codes).
A separate output power supply allows the CMOS output
swing to range from 0.5V to 3.6V.
A single-ended CLK input controls converter operation. An
optional clock duty cycle stabilizer allows high performance
at full speed with a wide range of clock duty cycles.
L,
LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
Protected by U.S. Patents including 4843302, 6949965B1.
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Sample Rate: 25Msps/10Msps
81.6dB SNR and 100dB SFDR (2.5V Range)
SFDR 90dB at 70MHz (1.667V
P-P
Input Range)
PGA Front End (2.5V
P-P
or 1.667V
P-P
Input Range)
380MHz Full Power Bandwidth S/H
Optional Internal Dither
Optional Data Output Randomizer
Single 3.3V Supply
Power Dissipation: 220mW/140mW
Clock Duty Cycle Stabilizer
Out-of-Range Indicator
Pin Compatible Family
25Msps: LTC2203 (16-Bit)
10Msps: LTC2202 (16-Bit)
48-Pin (7mm
×
7mm) QFN Package
APPLICATIONS
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Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Imaging Systems
ATE
TYPICAL APPLICATION
LTC2203: 128K Point FFT,
f
IN
= 5.1MHz, –1dBFS, PGA = 0
3.3V
SENSE
V
CM
2.2μF
A
IN +
ANALOG
INPUT
A
IN –
1.25V
COMMON MODE
BIAS VOLTAGE
INTERNAL ADC
REFERENCE
GENERATOR
OV
DD
0.5V TO 3.6V
+
S/H
AMP
16-BIT
PIPELINED
ADC CORE
CORRECTION
LOGIC AND
SHIFT REGISTER
OUTPUT
DRIVERS
OF
CLKOUT+
CLKOUT–
D15
D0
OGND
CMOS
OUTPUTS
CLOCK/DUTY
CYCLE
CONTROL
V
DD
GND
1μF
1μF
3.3V
1μF
AMPLITUDE (dBFS)
1μF
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
0
2
8
4
6
FREQUENCY(MHz)
10
12
22032 TA02
CLK
PGA
SHDN
DITH
MODE
OE
RAND
22032 TA01
ADC CONTROL INPUTS
22032fd
1

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Index Files: 2044  2581  1096  1902  656  42  52  23  39  14 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
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