590JB100M000DGR datasheet, PDF

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590JB100M000DGR: DescriptionStandard Clock Oscillators Single Frequency XO, OE Pin 2 (OE Pin 1 CMOS); CategoryPassive components; File Size394KB，15 Pages; ManufacturerSilicon Laboratories

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590JB100M000DGR Overview

Standard Clock Oscillators Single Frequency XO, OE Pin 2 (OE Pin 1 CMOS)

590JB100M000DGR Parametric

Parameter Name	Attribute value
Product Attribute	Attribute Value
Manufacturer	Silicon Laboratories
Product Category	Standard Clock Oscillators
Frequency	100 MHz
Frequency Stability	50 PPM
Load Capacitance	15 pF
Operating Supply Voltage	1.8 V
Supply Voltage - Min	1.71 V
Supply Voltage - Max	1.89 V
Output Format	CMOS
Termination Style	SMD/SMT
Package / Case	7 mm x 5 mm
Minimum Operating Temperature	- 40 C
Maximum Operating Temperature	+ 85 C
Length	7 mm
Width	5 mm
Height	1.65 mm
Packaging	Box
Current Rating	80 mA
Type	Crystal Oscillator
Duty Cycle - Max	55 %

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S i 5 9 0 / 5 91

1 ps M

I T T E R

RYSTAL

SC ILLA TOR

(XO)

(10 M H

Z TO

810 MH

)

Features

Available with any-frequency output



frequencies from 10 to 810 MHz



3rd generation DSPLL

with superior



jitter performance: 1 ps max jitter



Better frequency stability than SAW-



based oscillators



Internal fundamental mode crystal

ensures high reliability



Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry Standard 5x7 and

3.2x5 mm packages

Pb-free/RoHS-compliant

–40 to +85 ºC operating

temperature range

Si5602

Applications

SONET/SDH (OC-3/12/48)



Networking



SD/HD SDI/3G SDI video



Ordering Information:

See page 7.

Test and measurement



Storage



FPGA/ASIC clock generation



Description

The Si590/591 XO utilizes Silicon Laboratories’ advanced DSPLL

circuitry

to provide a low jitter clock at high frequencies. The Si590/591 supports any

frequency from 10 to 810 MHz. Unlike a traditional XO, where a unique

crystal is required for each output frequency, the Si590/591 uses one fixed

crystal to provide a wide range of output frequencies. This IC based

approach allows the crystal resonator to provide exceptional frequency

stability and reliability. In addition, DSPLL clock synthesis provides superior

supply noise rejection, simplifying the task of generating low jitter clocks in

noisy environments typically found in communication systems. The

Si590/591 IC based XO is factory configurable for a wide variety of user

specifications including frequency, supply voltage, output format, and

stability. Specific configurations are factory programmed at time of shipment,

thereby eliminating long lead times associated with custom oscillators.

Pin Assignments:

See page 6.

(Top View)

GND

CLK–

CLK+

Si590 (LVDS/LVPECL/CML)

GND

CLK

Functional Block Diagram

CLK– CLK+

17 k



Fixed

Frequency

Si590 (CMOS)

Any-rate

10–810 MHz

DSPLL

Clock

Synthesis

CLK–

CLK+

GND

17 k



GND

*Note: Output Enable High/Low Options Available – See Ordering Information

Si591 (LVDS/LVPECL/CML)

Rev. 1.1 12/17

Si590/591

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