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IDT74LVCH16652PA

Description
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD
File Size108KB,8 Pages
ManufacturerIDT (Integrated Device Technology, Inc.)
Websitehttp://www.idt.com/
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IDT74LVCH16652PA Overview

3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD

IDT74LVCH16652
3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER
INDUSTRIAL TEMPERATURE RANGE
3.3V CMOS 16-BIT BUS
TRANSCEIVER AND REGISTER
WITH 3-STATE OUTPUTS,
5V TOLERANT I/O, BUS-HOLD
• Typical t
SK(o)
(Output Skew) < 250ps
• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using
machine model (C = 200pF, R = 0)
• V
CC
= 3.3V ± 0.3V, Normal Range
• V
CC
= 2.7V to 3.6V, Extended Range
• CMOS power levels (0.4µ W typ. static)
µ
• All inputs, outputs, and I/O are 5V tolerant
• Supports hot insertion
• Available in SSOP and TSSOP packages
IDT74LVCH16652
FEATURES:
DESCRIPTION:
DRIVE FEATURES:
APPLICATIONS:
• High Output Drivers: ±24mA
• Reduced system switching noise
• 5V and 3.3V mixed voltage systems
• Data communication and telecommunication systems
This 16-bit transceiver and register is built using advanced dual metal CMOS
technology. This high-speed, low power device is organized as twoindependent
8-bit bus transceivers with 3-state D-type registers. The control circuitry is
organized for multiplexed transmission of data between A bus and B bus either
directly or from the internal storage registers. Each 8-bit transceiver/register
features complementary Output Enable (OEAB and
OEBA)
inputs to control the
transciever functions and Select lines (SAB and SBA) to select either real-time
data or stored data. Separate clock inputsare provided for A and B port
registers. Data on the A or B data bus, or both,can be stored in the internal
registers by the low-to-high transitions at theappropriate clock pins. Flow-
through organization of signal pins simplifieslayout. All inputs are designed with
hysteresis for improved noise margin.
The LVCH16652A has been designed with a ±24mA output driver. This
driver is capable of driving a moderate to heavy load while maintaining speed
performance.
The LVCH16652A has “bus-hold” which retains the inputs’ last state
whenever the input bus goes to a high impedance. This prevents floating inputs
and eliminates the need for pull-up/down resistors.
FUNCTIONAL BLOCK DIAGRAM
1
OEBA
56
2
OEBA
29
1
OEAB
1
CLKBA
1
SBA
1
CLKAB
1
SAB
1
2
OEAB
2
CLKBA
2
SBA
2
CLKAB
B REG
2
SAB
28
55
54
2
3
30
31
27
26
B REG
D
C
1
A
1
5
52
D
C
2
A
1
15
42
A REG
1
B
1
A REG
2
B
1
D
C
D
C
TO 7 OTHER CHANNELS
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
TO 7 OTHER CHANNELS
INDUSTRIAL TEMPERATURE RANGE
1
© 2004 Integrated Device Technology, Inc.
JANUARY 2004
DSC-4689/3

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Description 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD 3.3V CMOS 16-BIT BUS TRANSCEIVER AND REGISTER WITH 3-STATE OUTPUTS, 5V TOLERANT I/O, BUS-HOLD
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