DS2704 datasheet, PDF - EEWORLD Datasheet

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DS2704: Description1280-Bit EEPROM with SHA-1 Authentication; File Size328KB，18 Pages; ManufacturerMaxim; Websitehttps://www.maximintegrated.com/en.html

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1280-Bit EEPROM with SHA-1 Authentication

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DS2704

1280-Bit EEPROM with SHA-1 Authentication

www.maxim-ic.com

GENERAL DESCRIPTION

The DS2704 provides 1280 bits of EEPROM data

storage and a Secure Hash Algorithm (SHA) engine.

The Dallas 1-Wire

interface enables serial

communication on a single battery contact and the

64-bit unique serial number allows multidrop

networking and identification of individual devices.

The 1280-bit memory is organized as 5 pages of 32

bytes each and supports storage of battery cell

characteristics, charging voltage, current, and

temperature parameters, as well as battery pack

manufacturing data. The EEPROM pages are in

circuit rewritable and can be individually locked to

write protect data.

The DS2704 employs the Secure Hash Algorithm

(SHA-1) specified in the Federal Information

publication 180-1 and 180-2, and ISO/IEC 10118-3.

SHA-1 provides a robust cryptographic solution to

ensure battery packs or other peripherals have been

manufactured by authorized sources. The DS2704

processes a host transmitted challenge and the 64-

bit secret key stored on chip to produce a 160-bit

response for transmission back to the host. The

secret key is never transmitted between the battery

and the host.

PIN CONFIGURATION

3mm × 3mm TDFN

(TOP VIEW⎯PADS ON BOTTOM)

APPLICATIONS

2.5G/3G Wireless Handsets

PDAs

Handheld or Notebook Computers and Terminals

Digital Still and Video Cameras

FEATURES

Secure Challenge and Response Authentication

Using the SHA-1 Algorithm

Five Lockable 32-Byte Pages of EEPROM

Dallas 1-Wire Interface with Standard and

Overdrive Communications Speeds

Unique 64-Bit Serial Number

Compatible with DS2502 Memory Map and Read

Function Command

Operates with V

as Low as 2.5V

Tiny Chip-Scale UCSP and 3mm x 3mm TDFN

Packaging (Pb-Free)

APPLICATION EXAMPLE

ORDERING INFORMATION

PART

DS2704G+

DS2704G+T&R

DS2704W

TEMP RANGE

-30°C to +85°C

PIN-PACKAGE

3mm x 3mm TDFN-6

DS2704G+ on Tape-and-Reel

Bare Die

+ Denotes lead-free package.

1-Wire is a registered trademark of Dallas Semiconductor.

1 of 18

050907

DS2704: 1280-Bit EEPROM with SHA-1 Authentication

In SHA-1 computation mode, the supply current increases to I

DD2

for a period of t

SHA

. The computation mode load

current occurs after the last bit of one of the Compute MAC function commands is sent.

Programming mode is entered when writing the nonvolatile memory portions of the DS2704. The supply current

increases to I

DDP

for t

EEC

when a Copy Scratchpad, Write Status, Compute Secret, Clear/Lock Secret or Clear/Set

Overdrive Timing command is executed.

Functional compatibility has been maintained between the DS2502 and DS2704 at the Net Address/ROM

Command and Function Command levels for reading the Memory and Status data fields. Since the DS2704 is

based on EEPROM technology versus the EPROM technology used for the DS2502, writing of the Memory and

Status data fields is not the same as the DS2502. The DS2704 includes an on-chip charge pump to facilitate in-

circuit programming. The need to apply an external high voltage programming pulse during pack manufacture is

therefore eliminated. Data can be written to a 0 or 1 value up to N

EEC

times in the DS2704. The ability to reprogram

the data in the EEPROM pages makes the Page Address Redirection bytes in the Status data field unnecessary.

Therefore, the DS2704 maintains them for DS2502 read compatibility but they cannot be modified from their factory

default values of FFh.

AUTHENTICATION

Authentication is performed using a FIPS-180 compliant SHA-1 one way hash algorithm on a 512-bit message

block. The message block consists of a 64-bit secret, a 64-bit challenge and 384 bits of constant data. Optionally,

the 64-bit Net Address replaces 64 of the 384 bits of constant data used in the hash operation. Contact

Dallas/Maxim for details of the message block organization.

The host and the DS2704 both calculate the result based on the mutually known secret. The result data, known as

the Message Authentication Code (MAC) or Message Digest, is returned by the DS2704 for comparison to the

host’s result. Note that the secret is never transmitted on the bus and thus cannot be captured by observing bus

traffic. Each authentication attempt is initiated by the host system by providing a 64-bit random challenge via the

Write Challenge command. The host then issues the Compute MAC or Compute MAC with ROM ID command. The

MAC is computed per FIPS 180, and then returned as a 160-bit serial stream, beginning with the least significant

bit.

DS2704 AUTHENTICATION COMMANDS

WRITE CHALLENGE [0Ch].

This command writes the 64-bit challenge to the DS2704. The LSB of the 64-bit data

argument can begin immediately after the MSB of the command has been completed. If more than 8 bytes are

written, the final value in the challenge register will be indeterminate. The Write Challenge command

must be

issued prior to every

Compute MAC or Compute Next Secret command for reliable results.

COMPUTE MAC WITHOUT ROM ID [36h].

This command initiates a SHA-1 computation based on the Challenge

Value and Internal Secret. Logical 1’s are loaded in place of the ROM ID. This command allows the use of a master

secret and MAC response independent of the ROM ID. The DS2704 computes the MAC in t

SHA

after receiving the

last bit of this command. After the MAC computation is complete, the host must write 8 write zero time slots and

then issue 160 read time slots to receive the 20-byte MAC. See Figure 7 on page 18 for command timing.

COMPUTE MAC WITH ROM ID [35h].

This command is structured the same as the Compute MAC without ROM

ID, except that the ROM ID is included in the message block. With the ROM ID unique to each DS2704 included in

the MAC computation, use of a unique secret in each token and a master secret in the host device is allowed. See

application note “White Paper 4”, available at

http://www.maxim-ic.com,

for more information. See Figure 7 on page

18 for command timing.

NOTE:

Immediately after power-up, a dummy Compute MAC command is required to initialize the DS2704. If the

dummy command is not issued, the first authentication attempt is computed using a challenge value of 0. When

issuing the dummy Compute MAC command, the command sequence can be terminated immediately following the

bit of the Compute MAC command byte. Waiting for the SHA-1 computation and reading the results back are

not required.

SHA-1 related commands used while authenticating a battery or peripheral device are summarized in Table 1 for

convenience. Four additional commands for clearing, computing and locking of the Secret are described in detail in

the following section.

5 of 18

DS2704 Related Products

	DS2704	DS2704W	DS2704G+TR
Description	1280-Bit EEPROM with SHA-1 Authentication	1280-Bit EEPROM with SHA-1 Authentication	1280-Bit EEPROM with SHA-1 Authentication

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