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CAT28LV65GA-20T

Description
8K X 8 EEPROM 3V, 250 ns, PDSO28
Categorystorage    storage   
File Size72KB,12 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance
Download Datasheet Parametric View All

CAT28LV65GA-20T Overview

8K X 8 EEPROM 3V, 250 ns, PDSO28

CAT28LV65GA-20T Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeQFJ
package instructionQCCJ, LDCC32,.5X.6
Contacts32
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum access time200 ns
command user interfaceNO
Data pollingYES
Durability100000 Write/Erase Cycles
JESD-30 codeR-PQCC-J32
JESD-609 codee3
length13.97 mm
memory density65536 bit
Memory IC TypeEEPROM
memory width8
Humidity sensitivity level3
Number of functions1
Number of terminals32
word count8192 words
character code8000
Operating modeASYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize8KX8
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC32,.5X.6
Package shapeRECTANGULAR
Package formCHIP CARRIER
page size32 words
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
power supply3.3 V
Programming voltage3 V
Certification statusNot Qualified
ready/busyYES
Maximum seat height3.55 mm
Maximum standby current0.0001 A
Maximum slew rate0.008 mA
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature40
switch bitYES
width11.43 mm
Maximum write cycle time (tWC)5 ms
Base Number Matches1
CAT28LV65
64K-Bit CMOS PARALLEL EEPROM
FEATURES
s
3.0V to 3.6V supply
s
Read access times:
s
CMOS and TTL compatible I/O
s
Automatic page write operation:
H
GEN
FR
ALO
EE
LE
A
D
F
R
E
E
TM
– 150/200/250ns
s
Low power CMOS dissipation:
– 1 to 32 bytes in 5ms
– Page load timer
s
End of write detection:
– Active: 8 mA max.
– Standby: 100
µ
A max.
s
Simple write operation:
– On-chip address and data latches
– Self-timed write cycle with auto-clear
s
Fast write cycle time:
– Toggle bit
DATA
polling
– RDY/BUSY
BUSY
s
Hardware and software write protection
s
100,000 program/erase cycles
s
100 year data retention
– 5ms max.
s
Commercial, industrial and automotive
temperature ranges
DESCRIPTION
The CAT28LV65 is a low voltage, low power, CMOS
parallel EEPROM organized as 8K x 8-bits. It requires a
simple interface for in-system programming. On-chip
address and data latches, self-timed write cycle with
auto-clear and V
CC
power up/down write protection
eliminate additional timing and protection hardware.
DATA
Polling, RDY/BUSY and Toggle status bit signal
the start and end of the self-timed write cycle. Additionally,
the CAT28LV65 features hardware and software write
protection.
The CAT28LV65 is manufactured using Catalyst’s
advanced CMOS floating gate technology. It is designed
to endure 100,000 program/erase cycles and has a data
retention of 100 years. The device is available in JEDEC
approved 28-pin DIP, 28-pin TSOP, 28-pin SOIC or 32-
pin PLCC packages.
BLOCK DIAGRAM
A5–A12
ADDR. BUFFER
& LATCHES
INADVERTENT
WRITE
PROTECTION
ROW
DECODER
8,192 x 8
E
2
PROM
ARRAY
32 BYTE PAGE
REGISTER
VCC
HIGH VOLTAGE
GENERATOR
CE
OE
WE
CONTROL
LOGIC
I/O BUFFERS
TIMER
DATA POLLING,
RDY/BUSY &
TOGGLE BIT
COLUMN
DECODER
I/O0–I/O7
A0–A4
RDY/BUSY
ADDR. BUFFER
& LATCHES
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1024, Rev. D
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