Freescale Semiconductor
Technical Data
MC13770/D
Rev. 2, 11/2003
MC13770
(Scale 2:1)
MC13770
Single Band LNA and Mixer FEIC
Device
MC13770FC
Package Information
Plastic Package
Case 1345
(QFN-12)
Ordering Information
Device Marking
770
Package
QFN-12
1
Introduction
Contents
1
2
3
4
5
Introduction . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrical Specifications . . . . . . . . . . . . . . . .
Contact Description . . . . . . . . . . . . . . . . . . . .
Applications Information . . . . . . . . . . . . . . . .
Packaging Information. . . . . . . . . . . . . . . . . .
1
2
4
4
7
The MC13770 is a single band front-end IC designed for
wireless receiver applications. It contains a low noise
LNA and a high linearity mixer. The LNA is integrated
with a bypass switch to preserve input intercept
performance. The device is fabricated using Freescale's
Advanced RF BiCMOS process using the SiGe:C option
and is packaged in a 12 pin Quad Flat Non-leaded
package.
1.1
•
•
•
•
•
•
•
•
Features
RF Input Frequency: 2100 to 2400 MHz
LNA Gain = 15 dB (Typ)
LNA Input 3rd Order Intercept Point (IIP3) =
0 dBm (Typ)
LNA Noise Figure (NF) = 1.5 dB (Typ)
Bypass Mode Included for Improved Intercept
Point Performance
Double Balanced Mixer
Mixer Conversion Gain = 10 dB (Typ)
Mixer Noise Figure (NF) = 8.0 dB (Typ)
Freescale reserves the right to change the detail specifications as may be required to permit improvements in the design of its
products.
© Freescale Semiconductor, Inc., 2003, 2005. All rights reserved.
Electrical Specifications
•
•
Mixer Input 3rd Order Intercept Point (IIP3) = -3.0 dBm (Typ)
Total Supply Current = 8.0 mA
LNA = 3.0 mA
Mixer = 5.0 mA
LNA Out
Mix In
LO In+
LO In-
IF+
LNA In
IF-
Bypass
Enable
Mix Bias
Figure 1. Simplified Block Diagram
2
Electrical Specifications
Table 1. Maximum Ratings
Rating
Supply Voltage
Storage Temperature Range
Operating Temperature Range
Symbol
V
CC
T
stg
T
A
Value
3.6
-65 to 150
-40 to 85
Unit
V
°C
°C
Note:
Maximum Ratings and ESD
1. Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be
restricted to the limits in the Electrical Characteristics tables or Pin Descriptions section.
2. ESD (electrostatic discharge) immunity meets Human Body Model (HBM)
≤100
V and Machine Model (MM)
≤30
V.
Additional ESD data available upon request.
Table 2. Recommended Operating Conditions
Characteristic
Supply Voltage
Logic Voltage (Enable and Bypass Pins)
Input High Voltage
Input Low Voltage
0.85 V
CC
0
-
-
V
CC
0.15 V
CC
Symbol
Min
2.7
Typ
2.75
Max
3.0
Unit
Vdc
V
MC13770 Technical Data, Rev. 2
2
Freescale Semiconductor
Electrical Specifications
Table 3. Electrical Characteristics
Characteristic
Turn-on Time
Symbol
Min
-
Typ
100
Max
-
Unit
ns
LNA High Gain Mode
(Frequency = 2140 MHz, V
CC
= 2.75 V, Bypass = 2.75 V, Enable = 2.75 V)
LNA Gain
LNA Noise Figure
LNA Input IP3
LNA Supply Current
I
DD
-
-
-
-
15
1.5
0
3.0
-
-
-
-
dB
dB
dBm
mA
LNA Low Gain Mode
(RF = 2140 MHz, V
CC
= 2.75 V, Bypass = 0 V, Enable = 2.75 V)
LNA Gain
LNA Noise Figure
LNA Input IP3
LNA Supply Current
I
DD
-
-
-
-
-5.0
5.0
20
10
-
-
-
-
dB
dB
dBm
µA
Mixer Mode
(RF = 2140 MHz, LO = 2520 MHz, V
CC
= 2.75 Vdc, Enable = 2.75 V)
Conversion Gain
SSB Noise Figure
Input IP3
Supply Current
LO Drive Level
Note:
Tone spacing for IIP3 measurement is 5.0 MHz.
-
-
-
-
-
10
8.0
-3.0
5.0
-10
-
-
-
-
-
dB
dB
dBm
mA
dBm
Table 4. Truth Table
(1 = 2.75 V, 0 = 0 V)
Enable
0
0
1
1
Bypass
0
1
0
1
Mode
Sleep
Undefined - do not use
Low Gain
High Gain
MC13770 Technical Data, Rev. 2
Freescale Semiconductor
3
Contact Description
3
Contact Description
Table 5. Contact Function Description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
Symbol
LNA Out
Bypass
Mix In
Enable
LO+
LO-
IF+
IF-
V
CC
LNA In
Gnd
Mix Bias
LNA Output
LNA Bypass Control
Mixer Input
Chip Enable
Local Oscillator Input +
Local Oscillator Input -
Differential IF Output +
Differential IF Output -
Supply
LNA Input
Ground
Mixer Bias Adjustment
Description
4
Applications Information
Figure 2
shows the typical application circuit for 2110 to 2140 MHz band. The Mixer input is internally
broadband matched. Two typical IF output match circuits are provided in
Table 6 on page 5.
MC13770 Technical Data, Rev. 2
4
Freescale Semiconductor
Applications Information
V
CC1
L2
2.7 nH
R1
4.3 k
L1
2.7 nH
1
C11 1.0 pF
Bypass
Mix In
2
3
4
5
C6
33 pF
Enable
LO+
12
11
C1 33 pF
C12
0.5 pF
LNA In
C9
0.01 µF
C7
33 pF
R2
470
Ω
LNA Out
10
9
C2 33 pF
C8 0.01 µF
V
CC2
L3 *
8
R3 *
C10 *
L4 *
C3 *
Mini-Circuits
TC8-1 Transformer
8:1
7
C4 *
6
C5
33 pF
IF
* See
Table 6
for values.
Figure 2. Application Schematic
Table 6. Bill of Material for Application Schematic
Component
C3
C4
C10
L3
L4
R3
190 MHz IF
1.2 pF
1.2 pF
1.2 pF
150 nH
150 nH
5.0 kΩ
380 MHz IF
2.2 pF
2.2 pF
1.2 pF
39 nH
39 nH
20 kΩ
Note:
All other components are the same for both configurations.
MC13770 Technical Data, Rev. 2
Freescale Semiconductor
5
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