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570BCA001964DGR

Description
Programmable Oscillators Any, I2C Programmable XO
CategoryPassive components   
File Size550KB,37 Pages
ManufacturerSilicon Laboratories
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570BCA001964DGR Overview

Programmable Oscillators Any, I2C Programmable XO

570BCA001964DGR Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerSilicon Laboratories
Product CategoryProgrammable Oscillators
Frequency10 MHz to 1417.5 MHz
Frequency Stability20 PPM
Load Capacitance15 pF
Operating Supply Voltage3.3 V
Supply Voltage - Min2.97 V
Supply Voltage - Max3.63 V
Output FormatLVDS
Termination StyleSMD/SMT
Package / Case5 mm x 7 mm
Minimum Operating Temperature- 40 C
Maximum Operating Temperature+ 85 C
Length7 mm
Width5 mm
Height1.65 mm
PackagingBox
Current Rating99 mA
Duty Cycle - Max55 %
Mounting StyleSMD/SMT
Si 5 7 0 / S i 5 7 1
10 MH
Z TO
1.4 G H
Z
I
2
C P
ROGRAMMABLE
XO/VCXO
Features
Any programmable output
frequencies from 10 to 945 MHz and
select frequencies to 1.4 GHz
I
2
C serial interface
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available LVPECL, CMOS,
LVDS, and CML outputs
Industry-standard 5x7 mm
package
Pb-free/RoHS-compliant
1.8, 2.5, or 3.3 V supply
Si5602
Applications
Ordering Information:
SONET/SDH
xDSL
10 GbE LAN/WAN
ATE
High performance
instrumentation
Low-jitter clock generation
Optical modules
Clock and data recovery
See page 32.
Pin Assignments:
See page 31.
(Top View)
SDA
7
NC
1
6
V
DD
Description
The Si570 XO/Si571 VCXO utilizes Silicon Laboratories’ advanced DSPLL
®
circuitry to provide a low-jitter clock at any frequency. The Si570/Si571 are user-
programmable to any output frequency from 10 to 945 MHz and select frequencies
to 1400 MHz with <1 ppb resolution. The device is programmed via an I
2
C serial
interface. Unlike traditional XO/VCXOs where a different crystal is required for
each output frequency, the Si57x uses one fixed-frequency crystal and a DSPLL
clock synthesis IC to provide any-frequency operation. This IC-based approach
allows the crystal resonator to provide exceptional frequency stability and
reliability. In addition, DSPLL clock synthesis provides superior supply noise
rejection, simplifying the task of generating low-jitter clocks in noisy environments
typically found in communication systems.
OE
2
5
CLK–
GND
3
8
SCL
4
CLK+
Functional Block Diagram
V
DD
CLK-
CLK+
Si570
SDA
7
OE
Fixed
Frequency
XO
10-1400 MHz
DSPLL Clock
Synthesis
V
C
1
6
V
DD
SDA
SCL
OE
2
5
CLK–
Si571 only
ADC
GND
3
8
SCL
4
CLK+
GND
V
C
Si571
Si570/Si571
Rev. 1.5 4/14
Copyright © 2014 by Silicon Laboratories
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