EEWORLDEEWORLDEEWORLD

Part Number

Search

415-0073-MM250

Description
RF Cable Assemblies Straight SMA BH Jack R Ang MMCX Plug
CategoryWire/cable   
File Size342KB,14 Pages
ManufacturerCinch Connectivity Solutions
Download Datasheet Parametric View All

415-0073-MM250 Online Shopping

Suppliers Part Number Price MOQ In stock  
415-0073-MM250 - - View Buy Now

415-0073-MM250 Overview

RF Cable Assemblies Straight SMA BH Jack R Ang MMCX Plug

415-0073-MM250 Parametric

Parameter NameAttribute value
Product AttributeAttribute Value
ManufacturerCinch Connectivity Solutions
Product CategoryRF Cable Assemblies
Connector A SeriesMMCX
Connector A GenderPlug
Connector A Body StyleRight Angle
Connector B SeriesSMA
Connector B GenderJack
Connector B Body StyleStraight
Length250 mm
Cable TypeRG-316
PackagingBulk
Connector A PolarityNormal
Connector B PolarityNormal
Factory Pack Quantity1
RF Cable Assembly Guide
cinch.com
Is there something wrong with the disk? How to solve it? Waiting for a reply online, thank you...
The computer I am using now, Win2000 Pro system, occasionally restarts automatically. It is under normal operation, without any prompt, and the system automatically restarts! The system has just been ...
lingjian1026 Embedded System
About AGC circuit based on AD603
[i=s] This post was last edited by paulhyde on 2014-9-15 03:09 [/i] Because the 9854 has a strong attenuation in the high frequency area, I want to use AGC, but the typical AGC circuit of AD603 cannot...
kcookey Electronics Design Contest
[CN0175] Low-Cost, 8-Channel, Simultaneous Sampling Data Acquisition System with 84 dB SNR and Channel-to-Channel Matching
Circuit Function and BenefitsFor low cost, high channel count applications requiring wide dynamic range, the AD7607 8-channel integrated data acquisition system (DAS) with an on-chip 14-bit SAR ADC ca...
EEWORLD社区 ADI Reference Circuit
Help!! There is a problem with the waveform time-delay copy.
I would like to ask a tricky question. The code is to divide the CP input signal and output PCI1_CLK and PCI2_CLK. The interval time of the divided signal is that PCI2_CLK is a delayed copy of PCI1_CL...
yekeyaopei FPGA/CPLD
555 circuit (Protel simulation) video tutorial
[flash]http://player.youku.com/player.php/sid/XMjA3ODM0ODAw/v.swf[/flash]Share with you...
lilong8470 Analog electronics
Comprehensive error problem
I encountered the following problem when doing a design: there was no problem in the previous simulation, but the following error occurred during synthesis: cannot mix blocking and non blocking assign...
zhgshi FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2480  2654  383  2346  597  50  54  8  48  13 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号