M54HC590
M74HC590
8 BIT BINARY COUNTER REGISTER (3 STATE)
.
.
.
.
.
.
.
.
HIGH SPEED
f
MAX
= 62 MHz (TYP.) AT V
CC
= 5 V
LOW POWER DISSIPATION
I
CC
= 4
µA
(MAX.) AT T
A
= 25
°C
HIGH NOISE IMMUNITY
V
NIH
= V
NIL
= 28 % V
CC
(MIN.)
OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS (for RCO)
15 LSTTL LOADS (for QA
∼
QH)
SYMMETRICAL OUTPUT IMPEDANCE
I
OH
=
I
OL
= 6 mA (MIN.) FOR QA ~ QH OUTPUT
I
OH
=
I
OL
= 4 mA (MIN.) FOR RCO OUTPUT
BALANCED PROPAGATION DELAYS
t
PLH
= t
PHL
WIDE OPERATING VOLTAGE RANGE
V
CC
(OPR) = 2 V TO 6 V
PIN AND FUNCTION COMPATIBLE
WITH 54/74LS590
B1R
(Plastic Package)
F1R
(Ceramic Package)
M1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M54HC590F1R
M74HC590M1R
M74HC590B1R
M74HC590C1R
PIN CONNECTIONS
(top view)
DESCRIPTION
The M54/74HC590 is a high speed CMOS 8-BIT BI-
NARY COUNTER REGISTER (3-STATE) fabri-
2
cated in silicon gate C MOS technology. It has the
same high speed performance of LSTTL combined
with true CMOS low power consumption.
These devices each contain an 8-bit binary counter
that feeds an 8-bit storage register. The storage reg-
ister has parallel outputs. Separate clocks are pro-
vided for both the binary counter and storage
register. The binary counter features a direct clear
input CCLR and a count enable input CCKEN. For
cascading, a ripple carry output RCO is provided.
Expansion is easily accomplished by tying RCO of
the first stage to CCKEN of the second stage, etc.
Both the counter and register clocks are positive-
edge triggered. If the user wishes to connect both
clocks together, the counter state will always be one
count ahead of the register. Internal circuitry pre-
vents clocking from the clock enable.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
March 1993
NC =
No Internal
Connection
1/14
M54/M74HC590
PIN DESCRIPTION
PIN No
1, 2, 3, 4, 5,
6, 7, 15
11
12
13
9
14
10
8
16
SYMBOL
QA to QH
CCK
CCKEN
RCK
RCO
G
CCLR
GND
V
CC
NAME AND FUNCTION
Outputs
Counter Clock Input
Counter Clock Enable
Input
Register Clock Input
Ripple Carry Output
Output Enable Input
Counter Clear Input
Ground (0V)
Positive Supply Voltage
IEC LOGIC SYMBOL
ABSOLUTE MAXIMUM RATINGS
Symbol
V
CC
V
I
V
O
I
IK
I
OK
I
O
I
CC
or I
GND
P
D
T
stg
T
L
Parameter
Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Source Sink Current Per Output Pin (RCO)
(Q
A
- Q
H
)
DC V
CC
or Ground Current
Power Dissipation
Storage Temperature
Lead Temperature (10 sec)
Value
-0.5 to +7
-0.5 to V
CC
+ 0.5
-0.5 to V
CC
+ 0.5
±
20
±
20
±
25
±
35
±
70
500 (*)
-65 to +150
300
Unit
V
V
V
mA
mA
mA
mA
mW
o
o
C
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition isnotimplied.
(*) 500 mW:
≅
65
o
C derate to 300 mW by 10mW/
o
C: 65
o
C to 85
o
C
RECOMMENDED OPERATING CONDITIONS
Symbol
V
CC
V
I
V
O
T
op
t
r
, t
f
Parameter
Supply Voltage
Input Voltage
Output Voltage
Operating Temperature:
M54HC
Series
M74HC
Series
Input Rise and Fall Time
Value
2 to 6
0 to V
CC
0 to V
CC
-55 to +125
-40 to +85
0 to 1000
0 to 500
0 to 400
Unit
V
V
V
C
o
C
ns
o
V
CC
= 2 V
V
CC
= 4.5 V
V
CC
= 6 V
5/14
FPGA/CPLD
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