21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3B16232
3.3V, Synchronous 16-Bit to 32-Bit
FET Mux/Demux BusSwitch
PI3B16232
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
3.3V, Synchronous 16-Bit to 32-Bit FET
Mux/Demux BusSwitch
Product Features
• Near-Zero propagation delay.
• 5Ω Switches Connect Between Two Ports
• Packages Available :
- 56-pin 240mil Wide Thin Plastic TSSOP(A)
- 56-pin 300mil Wide Plastic SSOP(V)
Product Description
Pericom Semiconductor’s PI3B series of logic circuits are produced
using the company's advanced 0.35micron CMOS technology.
The PI3B16232 is a 3.3 volt, 16-bit to 32-bit synchronous switch.
Two select inputs (S0 and S1) control the data flow. A clock (CLK)
and a clock enable (CLKEN) synchronize the device operation.
When CLKEN is high, the bus switch remains in the last clocked
function.
Logic Block Diagram
Product Pin Configuration
56-Pin
A, V
Truth Table
S1
X
L
L
H
H
S0
X
L
H
L
H
CLK
X
↑
↑
↑
↑
CLKEN
H
L
L
L
L
Function
Last State
Disconnect
A = B1 and A = B2
A = B1
A = B2
1
PS8178B
11/09/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3B16232
3.3V, Synchronous 16-Bit to 32-Bit
FET Mux/Demux BusSwitch
Maximum Ratings
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ..................................................... –65°C to +150°C
Ambient Temperature with Power Applied .................... –40°C to +85°C
Supply Voltage Range ......................................................–0.5V to +4.6V
DC Input Voltage .............................................................–0.5V to +4.6V
DC Output Current ....................................................................... 120 mA
Power Dissipation ............................................................................. 0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above those
indicated in the operational sections of this specification
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
DC Electrical Characteristics
(Over the Operating Range, T
A
= –40°C to +85°C, V
CC
= 3.0V to 3.6V)
Parameters Description
V
IH
V
IL
I
IH
I
IL
I
OZH
V
IK
Ron
Input HIGH Voltage
Input LOW Voltage
Input HIGH Current
Input LOW Current
High Impedance Output Current
Clamp Diode Voltage
Switch on Resistance
(3)
Test Conditions
(1)
Guaranteed Logic HIGH Level
Guaranteed Logic LOW Level
V
CC
= Max., V
IN
= V
CC
V
CC
= M
AX
. , V
IN
= GND
0
≤
A, B
≤
V
CC
V
CC
= Min.,V
IN
= –18mA
V
CC
= Min., I
IN
= 0.0V, I
ON
= 48mA or 64mA
V
CC
= Min.,V
IN
= 2.4 V, I
ON
= 15mA
Min.
2.0
–0.5
—
—
—
—
—
—
—
—
-0.7
5
10
Typ
(2)
—
—
Max.
—
0.8
±1
±1
±1
-1.2
8
15
Units
V
V
µA
µA
µA
V
Ω
Ω
Capacitance
(T
A
= 25°C, f = 1 MHz)
Parameters
(4)
C
IN
C
ON
Description
Input Capacitance
A/B Capacitance, Switch On
Test Conditions
V
IN
= 0V
V
IN
= 0V
Typ.
3.0
25.0
Units
pF
pF
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for the applicable device.
2. Typical values are at Vcc = 3.3V, T
A
= 25°C ambient and maximum loading.
3. Measured by the voltage drop between A and B pin at indicated current through the switch. ON resistance is determined by the
lower of the voltages on the two (A,B) pins.
4. This parameter is determined by device characterization but is not production tested.
2
PS8178B
11/09/98
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI3B16232
3.3V, Synchronous 16-Bit to 32-Bit
FET Mux/Demux BusSwitch
Power Supply Characteristics
Parameters
I
CC
∆I
CC
I
CCD
Description
Quiescent Power
Supply Current
Supply Current per
Input @ TTL HIGH
Supply Current per
Input per MHz
(4)
V
CC
= M
AX
.
V
CC
= M
AX
.
V
CC
= Max.,
A and B Pins Open
BE = GND
Control Input Toggling
50% Duty Cycling
Test Conditions
(1)
V
IN
= GND or V
CC
V
IN
= 3.0 V
(3)
Min.
—
—
—
Typ
(2)
—
—
—
Max.
10
750
0.25
Units
µA
µA
mA/
MHz
Notes:
1. For Max. or Min. conditions, use appropriate value specified under Electrical Characteristics for applicable device.
2. Typical values are at Vcc = 3.3V, +25°C ambient.
3. Per TTL driven input (control inputs only); A and B pins do not contribute to Icc.
4. This current applies to the control inputs only and represent the current required to switch internal capacitance at the specified
frequency. The A and B inputs generate no significant AC or DC currents as they transition. This parameter is not tested, but is
guaranteed by design.
Switching Characteristics over Operating Range
Vcc = 3.0 to 3.6V
Parame te r
f
CLK
t
W
ts
D e s cription
Clock Frequency
Pulse Duration
Setup Time
CLK high or low
S0, S1 before CLK
↑
CLK EN before CLK
↑
S0, S1 after CLK
↑
CLK EN after CLK
↑
CLK to B1, B2
CLK to B1, B2
A to B
CLK to A
1
Te s t Conditions
(1)
M in.
0
3.3
1.9
1.9
1
1.8
1
1
5
6
0.25
4.5
ns
M ax.
150
Units
MHz
th
ten
tdis
tpd
1(2,3)
tpd
2
Hold Time
Enable Time
Disable Time
Propagation
Delay
Propagation
Delay
Notes:
1. See Test Circuits and Waveforms.
2. This parameter is guaranteed by design but not tested.
3. The bus switch contributes no propagational delay other than the RC delay of ON resistance of the switch and
the load capacitance.
3
PS8178B
11/09/98
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