ICS421-05
D
IGITAL
V
IDEO
C
AMERA
C
LOCK
Description
The ICS421-05 is a low-power, low-jitter clock
synthesizer developed for digital camera applications.
The device accepts a 27 MHz input clock to support
common digital video camera interface frequencies
including a 12 MHz for USB, 24.576 MHz for
IEEE1394, and a 72 MHz CCD clock. Power
consumption was minimized by lowering the voltage
requirement to 1.8 V minimum.
The ICS421-05 utilizes a small form factor 8-pin
TSSOP package.
ICS is a leader in low power, consumer application
clock sources. Devices are capable of supporting CCD,
video, audio, USB, CPU, and other peripherals.
Features
•
•
•
•
•
•
•
Ultra-low operating voltage from 1.8 V to 2.4 V
10 mA supply current
27 MHz input clock frequency
Fixed 24.576 MHz clock supports IEEE1394
Fixed 12 MHz clock supports USB
Fixed 72 MHz CCD clock
Packaged in 8-pin TSSOP (Pb free)
Block Diagram
VDD
2
IEEE
PLL
Clock
Buffer
CCD/
USB
PLL
1
GND
OE_USB
72M
12M
24.576M
27 MHz
Input Clock
CLKIN
MDS 421-05 B
I nt eg ra te d C ir c uit S y s t em s
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1
525 Ra ce St reet, San Jose, C A 95 126
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Revision 072304
tel (40 8) 2 97-12 01
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w w w. i c st . c o m
ICS421-05
D
IGITAL
V
IDEO
C
AMERA
C
LOCK
Pin Assignment
CLKIN
VDD
GND
24.576M
1
2
3
4
8
7
6
5
OE_USB
12M
VDD
72M
OE_USB Operation Table
OE_USB
Function
0
1
Output tri-state
Output running
8 pin (173 mil) TSSOP
Pin Descriptions
Pin
Number
1
2
3
4
5
6
7
8
Pin
Name
CLKIN
VDD
GND
24.576M
72M
VDD
12M
OE_USB
Pin
Type
Input
Power
Power
Output
Output
Power
Output
Input
Pin Description
27 MHz single ended clock input.
Connect to voltage supply.
Connect to ground.
24.576 MHz clock output.
72 MHz clock output for CCD.
Connect to voltage supply.
12 MHz clock output for USB.
Output enable for 12M clock for USB. See table for functionality,
internal pull-down.
External Components
Series Termination Resistor
Clock output traces over one inch should use series
termination. To series terminate a 50
Ω
trace (a
commonly used trace impedance), place a 33
Ω
resistor
in series with the clock line, as close to the clock output
pin as possible. The nominal impedance of the clock
output is 20
Ω
.
1) The 0.01µF decoupling capacitor should be mounted
on the component side of the board as close to the
VDD pin as possible. No vias should be used between
decoupling capacitor and VDD pin. The PCB trace to
VDD pin should be kept as short as possible, as should
the PCB trace to the ground via. Distance of the ferrite
bead and bulk decoupling from the device is less
critical.
2) To minimize EMI, the 33
Ω
series termination resistor
(if needed) should be placed close to the clock output.
3) An optimum layout is one with all components on the
same side of the board, minimizing vias through other
signal layers (the ferrite bead and bulk decoupling
capacitor can be mounted on the back). Other signal
traces should be routed away from the ICS421-05. This
includes signal traces just underneath the device, or on
layers adjacent to the ground plane layer used by the
device.
Decoupling Capacitor
As with any high-performance mixed-signal IC, the
ICS421-05 must be isolated from system power supply
noise to perform optimally.
A decoupling capacitor of 0.01µF must be connected
between VDD and the PCB ground plane.
PCB Layout Recommendations
For optimum device performance and lowest output
phase noise, the following guidelines should be
observed.
MDS 421-05 B
In te grated Circui t Systems
●
2
52 5 R ace St reet, San Jose , CA 9 5126
●
Revision 072304
te l (4 08) 297 -1 201
●
www.icst.com
ICS421-05
D
IGITAL
V
IDEO
C
AMERA
C
LOCK
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS421-05. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Supply Voltage, VDD
All Inputs and Outputs
Ambient Operating Temperature
Storage Temperature
Junction Temperature
Soldering Temperature
-0.5 V to 7 V
Rating
-0.5 V to VDD +0.5 V
0 to +70
°
C
-65 to +150
°
C
125
°
C
260
°
C
Recommended Operating Conditions
Parameter
Ambient Operating Temperature
Power Supply Voltage (measured in respect to GND)
Min.
0
+1.8
Typ.
–
Max.
+70
+2.4
Units
°
C
V
DC Electrical Characteristics
VDD = 1.8 V to 2.4 V
, Ambient Temperature 0 to +70
°
C, unless stated otherwise
Parameter
Operating Voltage
Input High Voltage
Input Low Voltage
Input High Voltage
Input Low Voltage
Output High Voltage
Output Low Voltage
Output High Voltage
Output Low Voltage
Operating Supply Current
Symbol
VDD
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
V
OH
V
OL
IDD
Conditions
CLKIN
CLKIN
OE_USB pin
OE_USB pin
VDD = 2.4 V,
I
OH
= -4 mA
VDD = 2.4 V,
I
OL
= 4 mA
VDD = 1.8 V
I
OH
= -4 mA
VDD = 1.8 V
I
OL
= 4 mA
No load, 3 out
Min.
1.80
VDD/2+0.5
Typ.
Max.
2.40
VDD/2-0.5
Units
V
V
V
V
V
V
TBD
TBD
1.9
0.4
1.4
0.4
10
V
V
V
mA
MDS 421-05 B
In te grated Circui t Systems
●
3
52 5 R ace St reet, San Jose , CA 9 5126
●
Revision 072304
te l (4 08) 297 -1 201
●
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ICS421-05
D
IGITAL
V
IDEO
C
AMERA
C
LOCK
Parameter
Short Circuit Current
Nominal Output Impedance
Symbol
I
OS
Z
o
Conditions
Each output
Min.
Typ.
50
20
150
Max.
Units
mA
W
k
Ω
On-chip Pull-down Resistor
OE_USB
Notes: 1. Nominal switching threshold is VDD/2
AC Electrical Characteristics
VDD = 1.8 V to 2.4 V
, Ambient Temperature 0 to +70
°
C, unless stated otherwise
Parameter
Input Frequency
Output Rise Time
Output Fall Time
Output Rise Time
Output Fall Time
Output Clock Duty Cycle
Absolute Pk-Pk Jitter
PLL Lock Time within 1%
Symbol
t
OR
t
OF
t
OR
t
OF
Conditions
Clock Input
VDD=2.4 V, 20% to
80%, C
L
=10 pF
VDD=2.4 V, 80% to
20%, C
L
=10 pF
VDD=1.8 V, 20% to
80%, C
L
=10 pF
VDD=1.8 V, 80% to
20%, C
L
=10 pF
at VDD/2
72 MHz output clock
Power OFF to lock
Min.
Typ.
27
1.8
1.8
2.5
2.5
50
±200
Max. Units
MHz
ns
ns
ns
ns
%
ps
10
ms
Thermal Characteristics
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Symbol
θ
JA
θ
JA
θ
JA
θ
JC
Conditions
Still air
1 m/s air flow
3 m/s air flow
Min.
Typ.
110
100
80
35
Max. Units
°
C/W
°
C/W
°
C/W
°
C/W
Marking Diagram
8
5
Notes:
1. ###### is the lot code.
2. YYWW is the last two digits of the year, and the week
number that the part was assembled.
3. “L” designates Pb (lead) free package.
YYWW
21G5L
######
1
4
MDS 421-05 B
In te grated Circui t Systems
●
4
52 5 R ace St reet, San Jose , CA 9 5126
●
Revision 072304
te l (4 08) 297 -1 201
●
www.icst.com
ICS421-05
D
IGITAL
V
IDEO
C
AMERA
C
LOCK
Package Outline and Package Dimensions (8-pin TSSOP, 173 Mil. Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
Symbol
Min
Max
Inches
Min
Max
8
INDEX
AREA
E1
E
1
D
A
A1
A2
b
C
D
E
E1
e
L
α
aaa
--
1.20
0.05
0.15
0.80
1.05
0.19
0.30
0.09
0.20
2.90
3.10
6.40 BASIC
4.30
4.50
0.65 Basic
0.45
0.75
0°
8°
--
0.10
--
0.047
0.002
0.006
0.032
0.041
0.007
0.012
0.0035 0.008
0.114
0.122
0.252 BASIC
0.169
0.177
0.0256 Basic
0.018
0.030
0°
8°
--
0.004
A2
A1
A
c
- C-
e
b
SEATING
PLANE
aaa
C
L
Ordering Information
Part / Order Number
ICS421G-05LF
ICS421G-05LFT
Marking
21G5L
Shipping Packaging
Tubes
Tape & Reel
Package
8-pin TSSOP
8-pin TSSOP
Temperature
0 to +70
°
C
0 to +70
°
C
“LF” denotes Pb (lead) free package.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS)
assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would
result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial
applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary
environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any
circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or
critical medical instruments.
MDS 421-05 B
In te grated Circui t Systems
●
5
52 5 R ace St reet, San Jose , CA 9 5126
●
Revision 072304
te l (4 08) 297 -1 201
●
www.icst.com
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