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PLL502-00DC

Description
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
File Size175KB,4 Pages
ManufacturerPLL (PhaseLink Corporation)
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PLL502-00DC Overview

Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals

PLL502-00
Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
FEATURES
Integrated voltage-controlled crystal oscillator
circuitry (VCXO) (pull range 500ppm minimum).
Low phase noise (-130dBc @ 10kHz offset at
44MHz output)
Selectable frequency multipliers (x1, x2, x4, x8).
3.3V supply voltage.
Uses inexpensive fundamental-mode parallel
resonant crystals (from 12 to 25MHz).
Selectable High Drive (30mA) or Standard Drive
(10mA) output.
Available in DIE (65 mil x 62 mil).
DIE CONFIGURATION
65 mil
VDD
VDD
OE^
S0
V
S1
V
S2
V
18
(1550,1475)
25
23
21
20
19
XIN
27
Die ID:
A0707-07A
62 mil
13
XOUT
CLK
29
DESCRIPTION
The PLL502-00 is a monolithic low jitter and low
phase noise (-130dBc @10kHz offset at 44MHz
output), high performance CMOS VCXO IC Die, that
uses a low cost crystal (12-25MHz).
The same die can be used as a VCXO with output
frequencies ranging from F
XIN
x 1 to F
XIN
x 8 using
selector pad bonding options (see Multiplier
Selection Table on this page). This makes the
PLL502-00 ideal for a wide range of applications
from 12MHz to 190MHz (including 27MHz,
35.328MHz, 77.76MHz and 155.52MHz, etc.).
VCON
31
C502A
10
GND
7
Y
X
Note:
^ denotes internal pull up
V
denotes internal pull down
MULTIPLIER SELECTION
SELECTION
S2
S1
S0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
F
XIN
CLK (MHz)
F
XIN
x 2
F
XIN
x 4
F
XIN
x 1
F
XIN
x 2*
F
XIN
x 8
F
XIN
x 1*
F
XIN
x 4*
F
XIN
x 8*
BLOCK DIAGRAM
12MHz – 25MHz
XIN
VCXO
Selectable
PLL
CLK
Note: -
Selector pads default to ‘0’, wire bond to VDD to set to ‘1’
- (*) High-drive output
VCON
PAD DESCRIPTION
Name
XIN
XOUT
Number
27
29
31
7,10
13
18,19,20
21,22,23
25
Description
Crystal input connection.
Crystal output connection.
Voltage Control Input.
Ground.
Clock Output.
Frequency selection pads
3.3V Power Supply.
Output Enable: ‘0’ to disable (tri-state
output), 1’ (default value when not
connected) to enabled the output.
DIE SPECIFICATIONS
Name
Value
VCON
GND
CLK
S[0:2]
VDD
OE
Size
Reverse side
Pad dimensions
Thickness
65 x 62 mil
GND
80 micron x 80 micron
10 mil
47745 Fremont Blvd., Fremont, California 94538 Tel (510) 492-0990 Fax (510) 492-0991
www.phaselink.com
Rev 09/17/04 Page 1
GND
(0,0)

PLL502-00DC Related Products

PLL502-00DC P502-00DC PLL502-00 PLL502-00DI
Description Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals Multiplier VCXO IC Die for 12 to 25MHz Parallel Resonant Crystals
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