CERAMIC LEADED CAPACITORS
Ceramic Leaded Capacitors
KEMET Series
Performance Information
MIL-PRF-20
C052G/C062G/C114G/
C124G/192G/C202G/C222G
C052T/C062T/C114T/
C124T/192T/C202T/C222T
C052K/C062K/C114K/
C124K/192K/C202K/C222K
Page
1-6
CERAMIC LEADED
7-12
MIL-PRF-39014/01/02/05
13-18
MIL-C-11015
13-18
19-21
Ceramic Leaded Packaging
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
APPLICATION NOTES FOR MULTILAYER CERAMIC CAPACITORS
ELECTRICAL CHARACTERISTICS
The fundamental electrical properties of multilayer
ceramic capacitors are as follows:
Polarity:
Multilayer ceramic capacitors are not polar,
and may be used with DC voltage applied in either direction.
Rated Voltage:
This term refers to the maximum con-
tinuous DC working voltage permissible across the entire
operating temperature range. Multilayer ceramic capacitors
are not extremely sensitive to voltage, and brief applications
of voltage above rated will not result in immediate failure.
However, reliability will be reduced by exposure to sustained
voltages above rated.
Capacitance:
The standard unit of capacitance is the
farad. For practical capacitors, it is usually expressed in
microfarads (10
-6
farad), nanofarads (10
-9
farad), or picofarads
(10
-12
farad). Standard measurement conditions are as
follows:
Class I (up to 1,000 pF):
Class I (over 1,000 pF):
Class II:
Class III:
1MHz and 1.2 VRMS
maximum.
1kHz and 1.2 VRMS
maximum.
1 kHz and 1.0
1 kHz and 0.5
0.2 VRMS.
0.1 VRMS.
The variation of a capacitor’s impedance with frequency
determines its effectiveness in many applications.
Dissipation Factor:
Dissipation Factor (DF) is a mea-
sure of the losses in a capacitor under AC application. It is the
ratio of the equivalent series resistance to the capacitive reac-
tance, and is usually expressed in percent. It is usually mea-
sured simultaneously with capacitance, and under the same
conditions. The vector diagram in Figure 2 illustrates the rela-
tionship between DF, ESR, and impedance. The reciprocal of
the dissipation factor is called the “Q”, or quality factor. For
convenience, the “Q” factor is often used for very low values
of dissipation factor. DF is sometimes called the “loss tangent”
or “tangent ”, as derived from this diagram.
Figure 2
ESR
DF = ESR
Xc
X
c
O
δ
Ζ
1
Xc
=
2πfC
Like all other practical capacitors, multilayer ceramic
capacitors also have resistance and inductance. A simplified
schematic for the equivalent circuit is shown in Figure 1.
Other significant electrical characteristics resulting from
these additional properties are as follows:
Figure 1
R
P
L
R
S
C
C = Capacitance
L = Inductance
R = Equivalent Series Resistance (ESR)
S
R = Insulation Resistance (IR)
P
Insulation Resistance:
Insulation Resistance (IR) is the
DC resistance measured across the terminals of a capacitor,
represented by the parallel resistance (Rp) shown in Figure 1.
For a given dielectric type, electrode area increases with
capacitance, resulting in a decrease in the insulation resis-
tance. Consequently, insulation resistance is usually specified
as the “RC” (IR x C) product, in terms of ohm-farads or
megohm-microfarads. The insulation resistance for a specific
capacitance value is determined by dividing this product by
the capacitance. However, as the nominal capacitance values
become small, the insulation resistance calculated from the
RC product reaches values which are impractical.
Consequently, IR specifications usually include both a mini-
mum RC product and a maximum limit on the IR calculated
from that value. For example, a typical IR specification might
read “1,000 megohm-microfarads or 100 gigohms, whichever
is less.”
Insulation Resistance is the measure of a capacitor to
resist the flow of DC leakage current. It is sometimes referred
to as “leakage resistance.” The DC leakage current may be
calculated by dividing the applied voltage by the insulation
resistance (Ohm’s Law).
Dielectric Withstanding Voltage:
Dielectric withstand-
ing voltage (DWV) is the peak voltage which a capacitor is
designed to withstand for short periods of time without dam-
age. All KEMET multilayer ceramic capacitors will withstand a
test voltage of 2.5 x the rated voltage for 60 seconds.
KEMET specification limits for these characteristics at
standard measurement conditions are shown on page 2.
Variations in these properties caused by changing conditions
of temperature, voltage, frequency, and time are covered in
the following sections.
Impedance:
Since the parallel resistance (Rp) is nor-
mally very high, the total impedance of the capacitor is:
Z=
Where
R
S
+ (X
C
- X
L
)
2
2
Z = Total Impedance
RS = Equivalent Series Resistance
X
C
= Capacitive Reactance =
1
2πfC
X
L
= Inductive Reactance = 2πfL
1
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
APPLICATION NOTES FOR MULTILAYER CERAMIC CAPACITORS
TABLE 1
EIA TEMPERATURE CHARACTERISTIC CODES
FOR CLASS I DIELECTRICS
Significant Figure
of Temperature
Coefficient
PPM per
Degree C
Letter
Symbol
Multiplier Applied
to Temperature
Coefficient
Multi-
plier
Number
Symbol
Tolerance of
Temperature
Coefficient *
PPM per
Degree C
Letter
Symbol
EFFECT OF TEMPERATURE
+0.2
+0.1
0.20
%∆C
0
0.10
0.0
0.3
0.9
1.0
1.5
2.2
3.3
4.7
7.5
C
B
A
M
P
R
S
T
U
-1
-10
-100
-1000
-100000
+1
+10
+100
+1000
+10000
0
1
2
3
4
5
6
7
8
9
3 0
60
120
250
500
1000
2500
G
H
J
K
L
M
N
-0.1
-0.2
-55
%DF
-40
-20
0
+20
+40
+60
+80
+100
0.0
+125
Figure 3.
Temperature
°C
Capacitance & DF vs Temperature - C0G
* These symetrical tolerances apply to a two-point measurement of
temperature coefficient: one at 25ºC and one at 85ºC. Some deviation
is permitted at lower temperatures. For example, the PPM tolerance
for C0G at -55 is +30 / -72 PPM.
+20
+10
8.0
6.0
4.0
%∆C
0
-10
-20
-60
TABLE 2
EIA TEMPERATURE CHARACTERISTIC CODES
FOR CLASS II & III DIELECTRICS
Low Temperature
Rating
Degree
Celcius
Letter
Symbol
%DF
-40
-20
0
+20
+40
+60
2.0
0.0
+80 +100 +120 +140
High Temperature Maximum Capacitance
Rating
Shift
Degree
Celcius
Number
Symbol
Percent
Letter
Symbol
Figure 4.
Temperature
°C
Capacitance & DF vs Temperature - X7R
+10C
-30C
-55C
Z
Y
X
+45C
+65C
+85C
+105C
+125C
+150C
+200C
2
4
5
6
7
8
9
±1.0%
±1.5%
±2.2%
±3.3%
±4.7%
±7.5%
±10.0%
±15.0%
±22.0%
+22 / -33%
+22 / -56%
+22 / -82%
A
B
C
D
E
F
P
R
S
T
U
V
SPECIFIED ELECTRICAL LIMITS
PARAMETER
Dissipation Factor: Measured at following conditions:
C0G - 1 kHz and 1 vrms if capacitance > 1000 pF
1 Mhz and 1 vrms if capacitance
≤
1000 pF
X7R - 1 kHz and 1 vrms* or if extended cap range 0.5 vrms
Dielectric Strength: 2.5 times rated DC voltage
Insulation Resistance (IR): At rated DC voltage,
or whichever of the two is smaller
Temperature Characteristics: Range, °C
Capacitance Change without DC voltage
* 1 MHz and 1 vrms if capacitance
≤
100 pF on military product.
TEMPERATURE CHARACTERISTICS
C0G
X7R
0.15%
2.5%
Pass Subsequent IR Test
1,000 MΩ−µF
or 100 GΩ
-55 to +125
0 ± 30 ppm/°C
1,000 MΩ−µF
or 100 GΩ
-55 to +125
±15%
2
© KEMET Electronics Corporation • P.O. Box 5928 • Greenville, SC 29606 (864) 963-6300 • www.kemet.com
%DF
%∆C
%DF
%∆C
APPLICATION NOTES FOR MULTILAYER CERAMIC CAPACITORS
EFFECT OF APPLIED VOLTAGE
% Capacitance Change
+10
+5
0
-5
AC
DC
-10
4
3
2
1
0.1
1
10
% D.F.
AC
DC
100
Figure 6.
AC or DC Volts Applied
Typical Effects of 1000 Hz AC and DC Voltage Level on
Capacitance and Dissipation Factor - X7R
Note: C0G Dielectric capacitance and dissipation factor are
stable with voltage.
Effect of Temperature:
Both capacitance and dissipa-
tion factor are affected by variations in temperature. The max-
imum capacitance change with temperature is defined by the
temperature characteristic. However, this only defines a “box”
bounded by the upper and lower operating temperatures and
the minimum and maximum capacitance values. Within this
“box”, the variation with temperature depends upon the spe-
cific dielectric formulation. Typical curves for KEMET capaci-
tors are shown in Figures 3 and 4. These figures also include
the typical change in dissipation factor for KEMET capacitors.
Insulation resistance decreases with temperature.
Typically, the insulation resistance at maximum rated temper-
ature is 10% of the 25ºC value.
Effect of Voltage:
Class I ceramic capacitors are not
affected by variations in applied AC or DC voltages. For Class
II and III ceramic capacitors, variations in voltage affect only
the capacitance and dissipation factor. The application of DC
voltage higher than 5 vdc reduces both the capacitance and
dissipation factor. The application of AC voltages up to 10-20
Vac tends to increase both capacitance and dissipation factor
At higher AC voltages, both capacitance and dissipation factor
begin to decrease.
Typical curves showing the effect of applied AC and DC
voltage are shown in Figure 6 for KEMET X7R capacitors.
Effect of Frequency:
Frequency affects both capaci-
tance and dissipation factor. Typical curves for KEMET multi-
layer ceramic capacitors are shown in Figures 8 and 9.
The variation of impedance with frequency is an impor-
tant consideration in the application of multilayer ceramic
capacitors. Total impedance of the capacitor is the vector of the
capacitive reactance, the inductive reactance, and the ESR, as
illustrated in Figure 2. As frequency increases, the capacitive
reactance decreases. However, the series inductance (L)
shown in Figure 1 produces inductive reactance, which
increases with frequency. At some frequency, the impedance
ceases to be capacitive and becomes inductive. This point, at
the bottom of the V-shaped impedance versus frequency
curves, is the self-resonant frequency. At the self-resonant fre-
quency, the reactance is zero, and the impedance consists of
the ESR only.
Typical impedance versus frequency curves for KEMET
multilayer ceramic capacitors are shown in Figures 10 and 11.
These curves apply to KEMET capacitors in chip form, without
leads. Lead configuration and lead length have a significant
impact on the series inductance. The lead inductance is
approximately 10nH/inch, which is large compared to the
inductance of the chip. The effect of this additional inductance
is a decrease in the self-resonant frequency, and an increase
in impedance in the inductive region above the self-resonant
frequency.
Effect of Time:
The capacitance of Class II and III
dielectrics change with time as well as with temperature, volt-
age and frequency. This change with time is known as “aging.”
It is caused by gradual realignment of the crystalline structure
of the ceramic dielectric material as it is cooled below its Curie
temperature, which produces a loss of capacitance with time.
The aging process is predictable and follows a logarithmic
decay. Typical aging rates for C0G and X7R dielectrics are as
follows:
C0G
X7R
None
2.0% per decade of time
Typical aging curves for X7R dielectrics is shown in
Figure 12.
The aging process is reversible. If the capacitor is heat-
ed to a temperature above its Curie point for some period of
time, de-aging will occur and the capacitor will regain the
capacitance lost during the aging process. The amount of de-
aging depends on both the elevated temperature and the
length of time at that temperature. Exposure to 150ºC for one-
half hour or 125ºC for two hours is usually sufficient to return
the capacitor to its initial value.
Because the capacitance changes rapidly immediately
after de-aging, capacitance measurements are usually delayed
for at least 10 hours after the de-aging process, which is often
referred to as the “last heat.” In addition, manufacturers utilize
3
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