GS81313LQ18GK-800 datasheet, PDF

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GS81313LQ18GK-800: DescriptionSRAM 1.2/1.25V 8M x 18 144M; Categorystorage; File Size300KB，26 Pages; ManufacturerGSI Technology; Websitehttp://www.gsitechnology.com/; Environmental Compliance

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GS81313LQ18GK-800 Overview

SRAM 1.2/1.25V 8M x 18 144M

GS81313LQ18GK-800 Parametric

Parameter Name	Attribute value
Product Attribute	Attribute Value
Manufacturer	GSI Technology
Product Category	SRAM
RoHS	Details
Memory Size	144 Mbit
Organization	8 M x 18
Maximum Clock Frequency	800 MHz
Interface Type	Parallel
Supply Voltage - Max	1.35 V
Supply Voltage - Min	1.2 V
Supply Current - Max	1.9 A
Minimum Operating Temperature	0 C
Maximum Operating Temperature	+ 85 C
Mounting Style	SMD/SMT
Package / Case	BGA-260
Packaging	Tray
Memory Type	DDR-III
Type	SigmaQuad-IIIe B2
Moisture Sensitive	Yes
Factory Pack Quantity	10

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GS81313LQ18/36GK-800/714/600

260-Pin BGA

Com & Ind Temp

HSTL I/O

Features

•

4Mb x 36 and 8Mb x 18 organizations available

800 MHz maximum operating frequency

1.6 BT/s peak transaction rate (in billions per second)

115 Gb/s peak data bandwidth (in x36 devices)

Separate I/O DDR Data Buses

Non-multiplexed DDR Address Bus

Two operations - Read and Write - per clock cycle

Burst of 2 Read and Write operations

3 cycle Read Latency

On-chip ECC with virtually zero SER

1.25V ~ 1.3V core voltage

1.2V ~ 1.3V HSTL I/O interface

Configurable ODT (on-die termination)

ZQ pin for programmable driver impedance

ZT pin for programmable ODT impedance

IEEE 1149.1 JTAG-compliant Boundary Scan

260-pin, 14 mm x 22 mm, 1 mm ball pitch, 6/6 RoHS-

compliant BGA package

144Mb SigmaQuad-IIIe™

Burst of 2 ECCRAM™

Clocking and Addressing Schemes

Up to 800 MHz

1.25V ~ 1.3V V

1.2V ~ 1.3V V

DDQ

The GS81313LQ18/36GK SigmaQuad-IIIe ECCRAMs are

synchronous devices. They employ three pairs of positive and

negative input clocks; one pair of master clocks, CK and CK,

and two pairs of write data clocks, KD[1:0] and KD[1:0]. All

six input clocks are single-ended; that is, each is received by a

dedicated input buffer.

CK and CK are used to latch address and control inputs, and to

control all output timing. KD[1:0] and KD[1:0] are used solely

to latch data inputs.

Each internal read and write operation in a SigmaQuad-IIIe B2

ECCRAM is two times wider than the device I/O bus. An input

data bus de-multiplexer is used to accumulate incoming data

before it is simultaneously written to the memory array. An

output data multiplexer is used to capture the data produced

from a single memory array read and then route it to the

appropriate output drivers as needed. Therefore, the address

field of a SigmaQuad-IIIe B2 ECCRAM is always one address

pin less than the advertised index depth (e.g. the 8M x 18 has

4M addressable index).

SigmaQuad-IIIe™ Family Overview

SigmaQuad-IIIe ECCRAMs are the Separate I/O half of the

SigmaQuad-IIIe/SigmaDDR-IIIe family of high performance

ECCRAMs. Although very similar to GSI's second generation

of networking SRAMs (the SigmaQuad-II/SigmaDDR-II

family), these third generation devices offer several new

features that help enable significantly higher performance.

On-Chip Error Correction Code

GSI's ECCRAMs implement an ECC algorithm that detects

and corrects all single-bit memory errors, including those

induced by SER events such as cosmic rays, alpha particles,

etc. The resulting Soft Error Rate of these devices is

anticipated to be <0.002 FITs/Mb — a 5-order-of-magnitude

improvement over comparable SRAMs with no on-chip ECC,

which typically have an SER of 200 FITs/Mb or more.

All quoted SER values are at sea level in New York City.

Parameter Synopsis

Speed Grade

-800

-714

-600

Max Operating Frequency

800 MHz

714 MHz

600 MHz

Read Latency

3 cycles

1.2V to 1.35V

Rev: 1.14 12/2017

1/26

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

GS81313LQ18GK-800 Related Products

	GS81313LQ18GK-800	GS81313LQ18GK-600	GS81313LQ18GK-600I	GS81313LQ36GK-600	GS81313LQ36GK-714	GS81313LQ36GK-600I	GS81313LQ18GK-714	GS81313LQ36GK-714I	GS81313LQ18GK-714I
Description	SRAM 1.2/1.25V 8M x 18 144M	SRAM 1.2/1.25V 8M x 18 144M	SRAM 1.2/1.25V 8M x 18 144M	SRAM 1.2/1.25V 4M x 36 144M	SRAM 1.2/1.25V 4M x 36 144M	SRAM 1.2/1.25V 4M x 36 144M	SRAM 1.2/1.25V 8M x 18 144M	Static random access memory 1.2/1.25V 4M x 36 144M	Static random access memory 1.2/1.25V 8M x 18 144M
Product Category	SRAM	SRAM	SRAM	SRAM	SRAM	SRAM	SRAM	static random access memory	static random access memory
Interface Type	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel	Parallel
Product Attribute	Attribute Value	Attribute Value	Attribute Value	Attribute Value	Attribute Value	Attribute Value	Attribute Value	-	-
Manufacturer	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology	GSI Technology	-	-
RoHS	Details	Details	Details	Details	Details	Details	Details	-	-
Memory Size	144 Mbit	144 Mbit	144 Mbit	144 Mbit	144 Mbit	144 Mbit	144 Mbit	-	-
Organization	8 M x 18	8 M x 18	8 M x 18	4 M x 36	4 M x 36	4 M x 36	8 M x 18	-	-
Maximum Clock Frequency	800 MHz	600 MHz	600 MHz	600 MHz	714 MHz	600 MHz	714 MHz	-	-
Supply Voltage - Max	1.35 V	1.35 V	1.35 V	1.35 V	1.35 V	1.35 V	1.35 V	-	-
Supply Voltage - Min	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	1.2 V	-	-
Supply Current - Max	1.9 A	1.5 A	1.5 A	2.1 A	2.35 A	2.1 A	1.7 A	-	-
Minimum Operating Temperature	0 C	0 C	- 40 C	0 C	0 C	- 40 C	0 C	-	-
Maximum Operating Temperature	+ 85 C	+ 85 C	+ 100 C	+ 85 C	+ 85 C	+ 100 C	+ 85 C	-	-
Mounting Style	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	SMD/SMT	-	-
Package / Case	BGA-260	BGA-260	BGA-260	BGA-260	BGA-260	BGA-260	BGA-260	-	-
Packaging	Tray	Tray	Tray	Tray	Tray	Tray	Tray	-	-
Memory Type	DDR-III	DDR-III	DDR-III	DDR-III	DDR-III	DDR-III	DDR-III	-	-
Type	SigmaQuad-IIIe B2	SigmaQuad-IIIe B2	SigmaQuad-IIIe B2	SigmaQuad-IIIe B2	SigmaQuad-IIIe B2	SigmaQuad-IIIe B2	SigmaQuad-IIIe B2	-	-
Moisture Sensitive	Yes	Yes	Yes	Yes	Yes	Yes	Yes	-	-
Factory Pack Quantity	10	10	10	10	10	10	10	-	-

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