Integrated
Circuit
Systems, Inc.
ICS843011
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
F
EATURES
•
1 differential 3.3V LVPECL output
•
Crystal oscillator interface designed for 26.5625MHz
18pF parallel resonant crystal
•
Output frequency: 106.25MHz or 100MHz
•
VCO range: 560MHz - 680MHz
•
RMS phase jitter @ 100MHz, using a 25MHz crystal
(637KHz - 10MHz): 0.80ps (typical)
•
RMS phase noise at 106.25MHz
Phase noise:
Offset
Noise Power
100Hz ............... -92.8 dBc/Hz
1KHz .............. -119.6 dBc/Hz
10KHz .............. -129.5 dBc/Hz
100KHz .............. -130.5 dBc/Hz
•
3.3V operating supply
•
Lead-Free package fully RoHS compliant
•
-40°C to 85°C ambient operating temperature
G
ENERAL
D
ESCRIPTION
The ICS843011 is a Fibre Channel Clock Generator
and a member of the HiPerClocks
TM
family of high
HiPerClockS™
performance devices from ICS. The ICS843011
uses a 26.5625MHz crystal to synthesize
106.25MHz or a 25MHz crystal to synthesize
100MHz. The ICS843011 has excellent <1ps phase jitter
performance, over the 637KHz – 10MHz integration range. The
ICS843011 is packaged in a small 8-pin TSSOP, making it ideal
for use in systems with limited board space.
ICS
F
REQUENCY
T
ABLE
Crystal (MHz)
26.5625
25
Output Frequency (MHz)
106.25
100
B
LOCK
D
IAGRAM
XTAL_IN
P
IN
A
SSIGNMENT
VCO
637.5MHz w/
26.5625MHz Ref.
OSC
XTAL_OUT
Phase
Detector
÷6
nQ0
Q0
V
CCA
V
EE
XTAL_OUT
XTAL_IN
1
2
3
4
8
7
6
5
V
CC
Q0
nQ0
nc
M = ÷24 (fixed)
ICS843011
8-Lead TSSOP
4.40mm x 3.0mm x 0.925mm package body
G Package
Top View
843011AG
www.icst.com/products/hiperclocks.html
1
REV. B DECEMBER 10, 2004
Integrated
Circuit
Systems, Inc.
ICS843011
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
Type
Power
Power
Input
Description
Analog supply pin.
Negative supply pin.
Crystal oscillator interface. XTAL_IN is the input,
XTAL_OUT is the output.
No connect.
Differential clock outputs. LVPECL interface levels.
Core supply pin.
T
ABLE
1. P
IN
D
ESCRIPTIONS
Number
1
2
3,
4
5
6, 7
8
Name
V
CCA
V
EE
XTAL_OUT,
XTAL_IN
nc
nQ0, Q0
V
CC
Unused
Output
Power
T
ABLE
2. P
IN
C
HARACTERISTICS
Symbol
C
IN
Parameter
Input Capacitance
Test Conditions
Minimum
Typical
4
Maximum
Units
pF
843011AG
www.icst.com/products/hiperclocks.html
2
REV. B DECEMBER 10, 2004
Integrated
Circuit
Systems, Inc.
ICS843011
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
4.6V
-0.5V to V
CC
+ 0.5V
50mA
100mA
101.7°C/W (0 mps)
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifications only. Functional
operation of product at these conditions or any conditions be-
yond those listed in the
DC Characteristics
or
AC Character-
istics
is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
A
BSOLUTE
M
AXIMUM
R
ATINGS
Supply Voltage, V
CC
Inputs, V
I
Outputs, I
O
Continuous Current
Surge Current
Package Thermal Impedance,
θ
JA
Storage Temperature, T
STG
T
ABLE
3A. P
OWER
S
UPPLY
DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
CC
V
CCA
I
CCA
I
EE
Parameter
Core Supply Voltage
Analog Supply Voltage
Analog Supply Current
Power Supply Current
included in I
EE
Test Conditions
Minimum
3.135
3.135
Typical
3.3
3.3
Maximum
3.465
3.465
12
93
Units
V
V
mA
mA
T
ABLE
3B. LVPECL DC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol
V
OH
V
OL
V
SWING
Parameter
Output High Voltage; NOTE 1
Output Low Voltage; NOTE 1
Peak-to-Peak Output Voltage Swing
Test Conditions
Minimum
V
CC
- 1.4
V
CC
- 2.0
0.6
Typical
Maximum
V
CC
- 0.9
V
CC
- 1.7
1.0
Units
V
V
V
NOTE 1: Outputs terminated with 50
Ω
to V
CC
- 2V.
T
ABLE
4. C
RYSTAL
C
HARACTERISTICS
Parameter
Mode of Oscillation
Frequency
Equivalent Series Resistance (ESR)
Shunt Capacitance
25
Test Conditions
Minimum
Typical
Fundamental
26.5625
50
7
MHz
Ω
pF
Maximum
Units
T
ABLE
5. AC C
HARACTERISTICS
,
V
CC
= 3.3V±5%, T
A
= -40°C
TO
85°C
Symbol Parameter
F
OUT
Output Frequency
RMS Phase Jitter (Random);
NOTE 1
Output Rise/Fall Time
Output Duty Cycle
106.25MHz;
Integration Range: 637KHz - 10MHz
100MHz;
Integration Range: 637KHz - 10MHz
20% to 80%
Test Conditions
Minimum
93.33
0.80
0.80
300
48
600
52
Typical
Maximum
113.33
Units
MHz
ps
ps
ps
%
t
jit(Ø)
t
R
/ t
F
odc
NOTE 1: Please refer to the Phase Noise Plot.
843011AG
www.icst.com/products/hiperclocks.html
3
REV. B DECEMBER 10, 2004
Integrated
Circuit
Systems, Inc.
ICS843011
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
T
YPICAL
P
HASE
N
OISE AT
100MH
Z
-10
-20
-30
-40
-50
-60
➤
Filter
100MHz
RMS Phase Noise Jitter
637K to 10MHz = 0.80ps (typical)
0
N
OISE
P
OWER
dBc
Hz
-70
-80
-90
-100
-110
-120
-130
-140
-150
-170
-180
-190
100
1k
10k
-160
Raw Phase Noise Data
➤
Phase Noise Result by adding
a Filter to raw data
100k
1M
10M
100M
T
YPICAL
P
HASE
N
OISE AT
106.25MH
Z
-10
-20
-30
-40
-50
-60
➤
O
FFSET
F
REQUENCY
(H
Z
)
➤
Fibre Channel Filter
106.25MHz
RMS Phase Noise Jitter
637K to 10MHz = 0.80ps (typical)
0
N
OISE
P
OWER
dBc
Hz
-70
-80
-90
-100
-110
-120
-130
-140
-150
-170
-180
-190
100
1k
10k
-160
Raw Phase Noise Data
➤
Phase Noise Result by adding
Fibre Channel Filter to raw data
100k
1M
10M
100M
➤
O
FFSET
F
REQUENCY
(H
Z
)
www.icst.com/products/hiperclocks.html
4
843011AG
REV. B DECEMBER 10, 2004
Integrated
Circuit
Systems, Inc.
ICS843011
F
EMTO
C
LOCKS
™ C
RYSTAL
-
TO
-
3.3V LVPECL C
LOCK
G
ENERATOR
P
ARAMETER
M
EASUREMENT
I
NFORMATION
2V
Phase Noise Plot
Noise Power
V
CC
Qx
SCOPE
LVPECL
nQx
Phase Noise Mask
V
EE
f
1
Offset Frequency
f
2
-1.3V ± 0.165V
RMS Jitter = Area Under the Masked Phase Noise Plot
3.3V O
UTPUT
L
OAD
AC T
EST
C
IRCUIT
RMS P
HASE
J
ITTER
nQ0
Q0
Pulse Width
t
PERIOD
80%
Clock
Outputs
80%
V
SW I N G
20%
t
R
t
F
20%
odc =
t
PW
t
PERIOD
O
UTPUT
D
UTY
C
YCLE
/P
ULSE
W
IDTH
/P
ERIOD
O
UTPUT
R
ISE
/F
ALL
T
IME
843011AG
www.icst.com/products/hiperclocks.html
5
REV. B DECEMBER 10, 2004
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