Product Specification
PE4263 DIE
SP6T UltraCMOS™ 2.6 V Switch
100 – 3000 MHz
Figure 1. Functional Diagram
Features
•
Three pin CMOS logic control with
•
TX1
RX1
•
•
•
•
•
TX2
RX2
RX3
CMOS
Control/Driver
and ESD
RX4
integral decoder/driver
Low TX insertion loss: 0.55 dB at 900
MHz, 0.65 dB at 1900 MHz
TX – RX Isolation of 48 dB at 900 MHz,
40 dB at 1900 MHz
Low harmonics: 2f
o
= -85 dBc and
3f
o
= -72 dBc
1500 V HBM ESD tolerance all ports
41 dBm P1dB
No blocking capacitors required
Product Description
V1
V2
V3
Figure 2. Die Top View
RX1
GND
RX2
GND
GND
GND
RX3
GND
TX2
GND
RX4
GND
TX1
ANT
The PE4263 SP6T RF UltraCMOS™ Switch
addresses the specific design needs of the
Quad-Band GSM Handset Antenna Switch
Module Market. On-chip CMOS decode logic
facilitates three-pin low voltage CMOS control.
High ESD tolerance of 1500 V at all ports, no
blocking capacitor requirements and on-chip
SAW filter over-voltage protection devices
make this the ultimate in integration and
ruggedness.
The PE4263 UltraCMOS™ RF Switch is
manufactured in Peregrine’s patented Ultra
Thin Silicon (UTSi®) CMOS process, offering
the performance of GaAs with the economy
and integration of conventional CMOS.
GND
VDD
V3
GND
V2 V1
GND
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Page 1 of 4
PE4263
Product Specification
Table 1. Electrical Specifications @ +25 °C, V
DD
= 2.6 V
(Z
S
= Z
L
= 50
Ω)
Parameter
Operational Frequency
ANT - TX - 850 / 900 MHz
Insertion Loss
ANT - TX - 1800 / 1900 MHz
ANT - RX - 850 / 900 MHz
ANT - RX - 1800 / 1900 MHz
TX - RX - 850 / 900 MHz
TX - RX - 1800 / 1900 MHz
Isolation
TX - TX - 850 / 900 MHz
TX - TX - 1800 / 1900 MHz
ANT - TX - 850 / 900 MHz
ANT - TX - 1800 / 1900 MHz
Return Loss
850 / 900 MHz
1800 / 1900 MHz
35 dBm TX Input - 850 / 900 MHz
33 dBm TX Input - 1800 / 1900 MHz
35 dBm TX Input - 850 / 900 MHz
33 dBm TX Input - 1800 / 1900 MHz
(10-90%) (90-10%) RF
0.55
0.65
0.90
1.00
48
40
29
25
31
25
22
23
-85
-81
-72
-66
2
Conditions
Typical
Units
MHz
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
2nd Harmonic
dBc
3rd Harmonic
Switching Time
dBc
µs
Table 2. Pin Descriptions
Pin No.
1
2
2
2
3
1
4
2
5
1
6
1
7
8
9
1
Pin Name
ANT
TX1
GND
TX2
GND
GND
V
DD
V3
GND
V2
V1
GND
GND
RX4
GND
RX3
GND
RX2
GND
RX1
RF I/O - TX1
Description
RF Common – Antenna
Figure 3. Pin Configuration (Top View)
ANT
TX1
Ground (Requires two bond wires)
RF I/O – TX2
Ground
Ground
Supply
Switch control input, CMOS logic level
Ground
Switch control input, CMOS logic level
Switch control input, CMOS logic level
Ground
Ground
RF I/O – RX4
Ground
RF I/O – RX3
Ground
RF I/O – RX2
Ground
RF I/O – RX1
6
7
2
1
20
19
RX1
GND
RX2
GND
RX3
GND
RX4
GND
GND
GND
3
18
17
10
11
12
1
TX2
GND
4
5
PE4263
Die
16
15
14
13
13
1
14
2
15
1
16
2
17
1
18
2
19
1
20
2
8
9
10
11
12
V3
V2
GND
GND
V1
Notes: 1. Bond wires should be physically short and connected to ground plane
for best performance.
2. Blocking capacitors needed only when non-zero DC voltage present.
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 4
Document No. 70-0175-02
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UltraCMOS™ RFIC Solutions
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GND
V
DD
PE4263
Product Specification
Table 3. Absolute Maximum Ratings
Symbol
V
DD
V
I
T
ST
T
OP
Parameter/Conditions
Power supply voltage
Voltage on any input
Storage temperature range
Operating temperature range
TX input power (50
Ω)
1
P
IN
RX input power (50
Ω)
1
ESD Voltage (HBM, MIL_STD
883 Method 3015.7)
ESD Voltage (MM, JEDEC,
JESD22-A114-B)
ESD Voltage (CDM, JEDEC,
JESD22-C101-A)
ESD Voltage at ANT Port
(IEC 61000-4-2)
Note: 1. Max RF specified with V
DD
applied
Table 4. DC Electrical Specifications
Max
4.0
V
DD
+
0.3
Units
V
V
°C
°C
Parameter
V
DD
Supply Voltage
I
DD
Power Supply Current
(V
DD
= 2.6V)
Control Voltage High
Control Voltage Low
0.7 x V
DD
0.3 x V
DD
Min
2.4
Typ
2.6
13
Max
2.8
20
Units
V
µA
V
V
Min
-0.3
-0.3
-65
-40
+150
+85
+38
dBm
+23
1500
100
2000
1700
V
V
V
V
Table 5. Truth Table
Path
ANT – RX1
ANT – RX2
ANT – RX3
ANT – RX4
ANT - TX1
ANT - TX2
V3
0
0
0
0
1
1
V2
0
0
1
1
0
1
V1
0
1
0
1
x
x
V
ESD
Electrostatic Discharge (ESD) Precautions
When handling this UltraCMOS™ device, observe
the same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the specified rating.
Absolute Maximum Ratings are those values
listed in the above table. Exceeding these values
may cause permanent device damage.
Functional operation should be restricted to the
limits in the DC Electrical Specifications table.
Exposure to absolute maximum ratings for
extended periods may affect device reliability.
Latch-Up Avoidance
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Table 6. Ordering Information
Order Code
4263-92
4263-98
4263-10
Die ID
C9797_3
C9797_3
C9797_3
Description
PE4263-DIE-D
PE4263-DIE-400G
PE4263-DIE-1H
Package
Film Frame
Waffle Pack
Evaluation Kit
Shipping Method
Wafer (Gross Die / Wafer Quantity)
400 Dice / Waffle Pack
1/ box
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PE4263
Product Specification
Sales Offices
The Americas
Peregrine Semiconductor Corp.
9450 Carroll Park Drive
San Diego, CA 92121
Tel 858-731-9400
Fax 858-731-9499
North Asia Pacific
Peregrine Semiconductor K.K.
5A-5, 5F Imperial Tower
1-1-1 Uchisaiwaicho, Chiyoda-ku
Tokyo 100-0011 Japan
Tel: +81-3-3502-5211
Fax: +81-3-3502-5213
Europe
Peregrine Semiconductor Europe
Commercial Products:
Bâtiment Maine
13-15 rue des Quatre Vents
F- 92380 Garches, France
Tel: +33-1-47-41-91-73
Fax : +33-1-47-41-91-73
Space and Defense Products:
180 Rue Jean de Guiramand
13852 Aix-En-Provence cedex 3, France
Tel: +33(0) 4 4239 3361
Fax: +33(0) 4 4239 7227
South Asia Pacific
Peregrine Semiconductor
28G, Times Square,
No. 500 Zhangyang Road,
Shanghai, 200122, P.R. China
Tel: +86-21-5836-8276
Fax: +86-21-5836-7652
For a list of representatives in your area, please refer to our Web site at:
www.psemi.com
Data Sheet Identification
Advance Information
The product is in a formative or design stage. The data
sheet contains design target specifications for product
development. Specifications and features may change in
any manner without notice.
The information in this data sheet is believed to be reliable.
However, Peregrine assumes no liability for the use of this
information. Use shall be entirely at the user’s own risk.
No patent rights or licenses to any circuits described in this
data sheet are implied or granted to any third party.
Peregrine’s products are not designed or intended for use in
devices or systems intended for surgical implant, or in other
applications intended to support or sustain life, or in any
application in which the failure of the Peregrine product could
create a situation in which personal injury or death might occur.
Peregrine assumes no liability for damages, including
consequential or incidental damages, arising out of the use of
its products in such applications.
The Peregrine name, logo, and UTSi are registered trademarks
and UltraCMOS is a trademark of Peregrine Semiconductor
Corp.
Preliminary Specification
The data sheet contains preliminary data. Additional data
may be added at a later date. Peregrine reserves the right
to change specifications at any time without notice in order
to supply the best possible product.
Product Specification
The data sheet contains final data. In the event Peregrine
decides to change the specifications, Peregrine will notify
customers of the intended changes by issuing a DCN
(Document Change Notice).
©2005 Peregrine Semiconductor Corp. All rights reserved.
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Document No. 70-0175-02
│
UltraCMOS™ RFIC Solutions
NDA required for full version: contact sales@psemi.com