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PE4302-01

Description
TNC Male Connector Crimp/Crimp Attachment For RG174, RG316, RG188
CategoryWireless rf/communication    Radio frequency and microwave   
File Size1013KB,11 Pages
ManufacturerpSemi (peregrine semiconductor)
Websitehttp://www.psemi.com/
Download Datasheet Parametric View All

PE4302-01 Overview

TNC Male Connector Crimp/Crimp Attachment For RG174, RG316, RG188

PE4302-01 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerpSemi (peregrine semiconductor)
package instructionLCC20,.16SQ,20
Reach Compliance Codecompli
Installation featuresSURFACE MOUNT
Number of terminals20
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
Encapsulate equivalent codeLCC20,.16SQ,20
power supply3 V
Maximum slew rate0.1 mA
surface mountYES
technologyCMOS
Product Specification
PE4302
Product Description
The PE4302 is a high linearity, 6-bit RF Digital Step Attenuator
(DSA) covering a 31.5 dB attenuation range in 0.5 dB steps.
This 50-ohm RF DSA provides both parallel and serial CMOS
control interface operates on a single 3-volt supply and
maintains high attenuation accuracy over frequency and
temperature. It also has a unique control interface that allows
the user to select an initial attenuation state at power-up. The
PE4302 exhibits very low insertion loss and low power
consumption. This functionality is delivered in a 4x4 mm QFN
footprint.
The PE4302 is manufactured on Peregrine’s UltraCMOS™
process, a patented variation of silicon-on-insulator (SOI)
technology on a sapphire substrate, offering the performance
of GaAs with the economy and integration of conventional
CMOS.
Figure 1. Functional Schematic Diagram
50
RF Digital Attenuator
6-bit, 31.5 dB, DC – 4.0 GHz
Features

Attenuation: 0.5 dB steps to 31.5 dB

Flexible parallel and serial programming
interfaces

Unique power-up state selection
Switched Attenuator Array
RF Input
6
Serial Control
Power-Up Control
Table 1. Electrical Specifications @ +25°C, V
DD
= 3.0 V
O
Operation Frequency
Insertion Loss
2
E
Parameter
BS
C
3
2
Control Logic Interface
Test Conditions
W
IT
H
Frequency
Minimum
DC
-
-
30
-
15
-
1.5
-
34
52
20
-
Parallel Control
O
DC - 2.2 GHz
DC
1.0 GHz
1.0 < 2.2 GHz
1 MHz - 2.2 GHz
1 MHz - 2.2 GHz
DC - 2.2 GHz
LE
PE
T

50
impedance
4x4 mm 20-Lead QFN
Figure 2. Package Type
RF Output
Typical
43
4000
1.75
-
-
-
1
E
12

Positive CMOS control logic

Very low power consumption

Single-supply operation
Maximum
±(0.10 + 3% of atten setting)
±(0.15 + 5% of atten setting)

High attenuation accuracy and linearity
over temperature and frequency

Packaged in a 20 lead 4x4mm QFN
Units
MHz
dB
dB
dB
dBm
dBm
dB
s
Attenuation Accuracy
1 dB Compression
3
Input IP3
1,2
Return Loss
Switching Speed
Document No. 70-0056-04
www.psemi.com
R
Notes: 1. Device Linearity will begin to degrade below 1 Mhz
2. See Max input rating in Table 3 & Figures on Pages 2 to 4 for data across frequency.
3. Note Absolute Maximum in Table 3.
©2003-2008 Peregrine Semiconductor Corp. All rights reserved.
Page 1 of 11
EP
LA
Any Bit or Bit
Combination
Two-tone inputs
+18 dBm
50% control to 0.5 dB
of final value
Logo updated under non-rev change. Peregrine products are protected under one or more of the following U.S. Patents: http://patents.psemi.com
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