Product Specification
PE926C31
Product Description
The PE926C31 is a high performance monolithic CMOS
RS-422 line driver. Its operating supply range is 3.0 to 3.6
V, with an output signal overvoltage range of 0 – 6 V. The
PE26C31 offers higher speed and lower power than other
RS-422 driver types. It is packaged in a flat pack and is
ideal for space applications.
The PE926C31 is manufactured in Peregrine’s patented
Ultra Thin Silicon (UTSi®) CMOS process, offering the
performance of GaAs with the economy and integration of
conventional CMOS.
Quad RS-422 Differential Line
Driver Radiation Hardened
Features
•
High-speed operation: < 10 nS typical
•
Low power: < 150 uA typical
(unloaded)
•
3.3 V operation
•
Standard packaging: 16-lead flat pack
•
SEL Immune UTSi CMOS-on-sapphire
•
SEU <10-10 errors / bit-day
•
300 Krad Total Dose
Figure 1. Package Drawing
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PE926C31
Product Specification
Figure 2. Pin Configuration (Top View)
A
AQ+
AQ-
E+
BQ-
BQ+
B
V-
1
2
3
4
5
6
7
8
16
15
14
V+
D
Table 2. Recommended Operating Conditions
Symbol
V+
T
OP
VIN
Parameter/Conditions
Supply voltage
Operating temperature
range
Maximum input voltage
Maximum output voltage
Maximum output current
Min
3.0
-55
0
0
-50
Max
3.6
125
Vdd
Vdd
50
Units
V
°C
V
V
mA
DQ+
DQ-
E-
VOUT
IOUT
PE926C31
13
12
11
10
9
Electrostatic Discharge (ESD) Precautions
CQ-
CQ+
C
When handling this UTSi device, observe the
same precautions that you would use with other
ESD-sensitive devices. Although this device
contains circuitry to protect it from damage due to
ESD, precautions should be taken to avoid
exceeding the rating specified in Table 2.
Latch-Up Avoidance
Table 1. Pin Descriptions
Pin
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin
Name
A
AQ+
AQ-
E+
BQ-
BQ+
B
V-
C
CQ+
CQ-
E-
DQ-
DQ+
D
V+
Description
Channel A Input
Channel A Noninverting Ouput
Channel A Inverting Output
Enable, active high
Channel B Inverting Output
Channel B Noninverting Output
Channel B Input
Ground Pin
Channel C Input
Channel C Noninverting Output
Channel C Inverting Ouput
Enable, active low
Channel D Inverting Output
Channel D Noninverting Output
Channel D Input
Supply Pin
Unlike conventional CMOS devices, UltraCMOS™
devices are immune to latch-up.
Device Functional Considerations
The PE926C31 operates at high switching
speeds. In order to obtain maximum
performance, it is crucial that pin 16 be supplied
with a bypass capacitor to ground (pin 8).
Table 3. Truth Table
E+
L
H
X
H
X
E-
H
X
L
X
L
Data
X
L
Q+
Z
L
Q-
Z
H
H
H
L
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 2 of 7
Document No. 70-0157-01
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UltraCMOS™ RFIC Solutions
PE926C31
Product Specification
Table 4. Electrical Specifications
-55° C < Tcase < 125° C, 3.0 V < V+ < 3.6 V, PreRad, unless otherwise specified
Param
VD1
VD2
DVD2
VCM
DVCM
IOZH
IOZL
IOSC
IOFFH
IOFFL
VOH
VOL
VIH
VIL
IIH
IIL
VIKL
VIKH
ICC
Description
Output Differential Voltage
Output Differential Voltage
Output Differential Voltage Change
Common Mode Voltage
Common Mode Voltage Change
Tristate Output Leakage (H)
Tristate Output Leakage (L)
Output Short Circuit Current
Output Leakage Current (H)
Output Leakage Current (L)
Output High Voltage
Output Low Voltage
Input threshold H
Input Threshold L
Input Lkg Current
Input Lkg Current
Input Clamp Diode Voltage
Input Clamp Diode Voltage
Supply Current
Conditions
No load
RL=100
Ω,
Fig DC1
IOUT 0 – 20mA, Fig DC1
RL=100
Ω,
Fig DC1
RL=100
Ω,
Fig DC1
VOUT = V+, disabled
VOUT = 0.0 V, disabled
VOUT = 0.0 V, Enabled Q=H
VOUT=6.0V,V+ and all inputs
= 0.0V
VOUT=-0.25V,V+ and all
inputs = 0.0V
Iout=-20mA
Iout=20mA
Vdd=3.6V (VIHMIN=0.7*VDD)
Vdd=3.0V
(VILMAX=0.3*VDD)
Pin(s)
AQ+, AQ-, BQ+, BQ-,
CQ+, CQ-, DQ+, DQ-
Min
(V+) -0.3
1.9
-0.4
Typ
(V+)
2.3
0
1.5
Max
(V+)
+0.6
Units
V
V
0.4
2.0
0.4
V
V
V
uA
-0.4
-5
0
-0.1
0.1
5
-100
100
uA
mA
uA
uA
V
-30
-70
1
-100
2.0
-1
2.4
0.1
0.5
V
V
A, B, C, D, E+, E-
A, B, C, D, E+, E-
A, B, C, D, E+, E-
A, B, C, D, E+, E-
2.5
0.9
-1
-1
-1.5
(V+) +
1.5 V
120
uA
150 uA
1
1
V
uA
uA
IIN=-20 mA
IIN=20 mA
No load, Inputs = 0 V or V+
A, B, C, D, E+, E-
A, B, C, D, E+, E-
V+
µ
Notes:
1. “Line” pins refer to AQ-, AQ+, BQ-, BQ+, CQ-, CQ+, DQ-, DQ+, differential outputs
2. “Digital Input” or “Enable” pins refer to E+, E-
3. “Digital Input” pins refer to A, B, C, D
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Page 3 of 7
PE926C31
Product Specification
Table 5. Post-Irradiation DC Electrical Specifications
Tcase = 25° C, 3.0 V < V+ < 3.6 V, 300 KRad, unless otherwise specified
Param
VD1
VD2
DVD2
VCM
DVCM
IOZH
IOZL
IOSC
IOFFH
IOFFL
VOH
VOL
VIH
VIL
IIH
IIL
VIKL
VIKH
ICC
Description
Output Differential Voltage
Output Differential Voltage
Output Differential Voltage
Change
Common Mode Voltage
Common Mode Voltage Change
Tristate Output Leakage (H)
Tristate Output Leakage (L)
Output Short Circuit Current
Output Leakage Current (H)
Output Leakage Current (L)
Output High Voltage
Output Low Voltage
Input threshold H
Input Threshold L
Input Lkg Current
Input Lkg Current
Input Clamp Diode Voltage
Input Clamp Diode Voltage
Supply Current
Conditions
No load
RL=100
Ω,
Fig DC1
IOUT 0 – 20mA, Fig DC1
RL=100
Ω,
Fig DC1
RL=100
Ω,
Fig DC1
VOUT = V+, disabled
VOUT = 0.0 V, disabled
VOUT = 0.0 V, Enabled Q=H
VOUT=6.0V,V+ and all inputs
= 0.0V
VOUT=-0.25V,V+ and all
inputs = 0.0V
Iout=-20mA
Iout=20mA
Vdd=3.6V
(VIHMIN=0.7*VDD)
Vdd=3.0V
(VILMAX=0.3*VDD)
Pin(s)
AQ+, AQ-, BQ+, BQ-,
CQ+, CQ-, DQ+, DQ-
Min
(V+) -0.3
1.9
-0.4
Typ
(V+)
2.3
0
1.5
Max
(V+) +0.6
Units
V
V
0.4
2.0
0.4
V
V
V
uA
-0.4
-5
0
-0.1
0.1
5
-100
100
uA
mA
uA
uA
V
-30
-70
1
-100
2.0
-1
2.4
0.1
0.5
V
V
A, B, C, D, E+, E-
A, B, C, D, E+, E-
A, B, C, D, E+, E-
A, B, C, D, E+, E-
2.5
0.9
-1
-1
-1.5
(V+) +
1.5 V
120
uA
150 uA
1
1
V
uA
uA
IIN=-20 mA
IIN=20 mA
No load, Inputs = 0 V or V+
A, B, C, D, E+, E-
A, B, C, D, E+, E-
V+
Notes:
1. “Line” pins refer to AQ-, AQ+, BQ-, BQ+, CQ-, CQ+, DQ-, DQ+, differential outputs
2. “Digital Input” or “Enable” pins refer to E+, E-
3. “Digital Input” pins refer to A, B, C, D
4. Output Short Circuit not intended to imply continuous operation
©2005 Peregrine Semiconductor Corp. All rights reserved.
Page 4 of 7
Document No. 70-0157-01
│
UltraCMOS™ RFIC Solutions
PE926C31
Product Specification
Table 6. Pre-irradiation Electrical Specifications
-55° C < Tcase < 125° C, 3.0 V < V+ < 3.6 V, PreRad, unless otherwise specified
Param
TPHL
TPLH
TSK1
TSK2*
TRISE*
TFALL*
TPHZ
TPZH
TPLZ
TPZL
Description
Prop Delay H-L
Prop Delay H-L
Prop Delay Q+/Q-
Prop Delay Skew Ch/Ch
Rise Time 20%/80%
Fall Time 20%/80%
Prop Delay H-Z
Prop Delay Z-H
Prop Delay L-Z
Prop Delay Z-L
Conditions
RL=100 CL=50 pF
Pin(s)
AQ+,
AQ-,
BQ+,
BQ-,
CQ+,
CQ-,
DQ+,
DQ-
Min
3
3
-3
-3
Typ
9
9
0
0
3
3
12
12
10
10
Max
15
15
3
3
10
10
20
20
20
20
Units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
Table 7. Post-irradiation Electrical Specifications
25° C, 3.0 V < V+ < 3.6 V, 300 KRad, unless otherwise specified
Param
TPHL
TPLH
TSK1
TSK2*
TRISE*
TFALL*
TPHZ
TPZH
TPLZ
TPZL
Description
Prop Delay H-L
Prop Delay H-L
Prop Delay Q+/Q-
Prop Delay Skew Ch/Ch
Rise Time 20%/80%
Fall Time 20%/80%
Prop Delay H-Z
Prop Delay Z-H
Prop Delay L-Z
Prop Delay Z-L
Conditions
RL=100 CL=50 pF
Pin(s)
AQ+,
AQ-,
BQ+,
BQ-,
CQ+,
CQ-,
DQ+,
DQ-
Min
3
3
-3
-3
Typ
9
9
0
0
3
3
20
20
10
10
Max
15
15
3
3
10
10
20
20
20
20
Units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
*Note:
Guaranteed by design, not tested
Document No. 70-0157-01
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©2005 Peregrine Semiconductor Corp. All rights reserved.
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