EEWORLDEEWORLDEEWORLD

Part Number

Search

B65661-315-A48

Description
PM/P/P Cores Halves/EP/TT/PR Cores
File Size127KB,5 Pages
ManufacturerEPCOS (TDK)
Download Datasheet View All

B65661-315-A48 Overview

PM/P/P Cores Halves/EP/TT/PR Cores

PM/P/P Cores Halves/EP/TT/PR Cores
Series/Type:
P 22 x 13
The following products presented in this data sheet are being withdrawn.
Ordering Code
B65662B0000T002
B65661D0000R026
B65662A50020000
B65662A50000000
B65665C00040000
B65665C00050000
Substitute Product
B65662B0000T001
B65661D0000R048
Date of
Withdrawal
2003-08-08
2002-08-02
2004-10-18
2004-10-18
2004-10-18
2004-10-18
Deadline Last
Orders
2004-02-29
2002-12-31
2005-03-31
2005-03-31
2005-03-31
2005-03-31
Last Shipments
2004-08-31
2003-03-31
2005-09-30
2005-09-30
2005-09-30
2005-09-30
For further information please contact your nearest EPCOS sales office, which will also support
you in selecting a suitable substitute. The addresses of our worldwide sales network are
presented at www.epcos.com/sales.
Does anyone know what the coating on the inner pot of a bread machine is?
Does anyone know what the coating of the bread machine's inner pot is? Is it different from the Teflon coating of the previous non-stick pans? I seem to remember that there was a problem with the coat...
wangfuchong Talking
Purgatory Legend-The battle of key debounce based on spike pulse
[align=left]Spike pulse is a very important signal in circuit design. In many large-scale designs, the cascade handshake signal between modules generally uses spike pulse. The correct application of s...
梦翼师兄 FPGA/CPLD
With a late ticket, you no longer have to worry about being fined for being late.
With the late ticket, you no longer have to worry about being fined for being late, hahaha...
ledjob88 Talking
[Project source code] FPGA-based cmos_init OV5640 camera I2C interface controller
OV5640 provides an SCCB interface to accept various initialization settings of the application processor. This interface is fully compatible with the I2C bus, so here is an implementation program base...
小梅哥 FPGA/CPLD
HyperTerminal to Development Board Development Board Problem
Hello everyone, I am a newbie. I use the HyperTerminal in WINDOWS to click Send and set the path. I want to transfer the file to the development board. Why does it show a CRC error? My 2410C VIVI has ...
fanfangzhang Embedded System
Can the outputs of several LDO chips be connected in parallel?
Can I ask the teachers if the outputs of several LDO chip linear power supplies can be directly connected in parallel? For LDO or linear regulated power supplies, if the output load capacity is insuff...
kal9623287 Power technology

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 565  693  2605  1592  806  12  14  53  33  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号