Z86L991 datasheet, PDF - EEWORLD Datasheet

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Z86L991: DescriptionLow-Voltage Micro controllers with ADC; File Size851KB，102 Pages; ManufacturerZilog, Inc.; Websitehttps://www.zilog.com/

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Z86L991 Overview

Low-Voltage Micro controllers with ADC

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Z86D990/Z86D991 OTP and

Z86L99X ROM

Low-Voltage Micro-

controllers with ADC

Preliminary Product Specification

PS003807-1002

ZiLOG Worldwide Headquarters • 532 Race Street • San Jose, CA 95126-3432

Telephone: 408.558.8500 • Fax: 408.558.8300 •

www.ZiLOG.com

Z86D990/Z86D991 OTP and Z86L99X ROM

Low-Voltage Microcontrollers with ADC

iii

Table of Contents

Architectural Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Counter/Timers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Input/Output and Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

User-Programmable Option Bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Pins Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Operational Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Central Processing Unit (CPU) Description . . . . . . . . . . . . . . . . . . . . . . . . . . 9

Memory (ROM/OTP and RAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

Clock Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Interrupts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Reset Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Power Management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

I/O Ports . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Peripherals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Control and Status Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Registers (Grouped by Function) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Standard Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Analog-to-Digital Converter Characteristics . . . . . . . . . . . . . . . . . . . . . . . .

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91

Design Considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

Precharacterization Product . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

PS003807-1002

Z86D990/Z86D991 OTP and Z86L99X ROM

Low-Voltage Microcontrollers with ADC

List of Figures

Figure 1.

Figure 2.

Figure 3.

Figure 4.

Figure 5.

Figure 6.

Figure 7.

Figure 8.

Figure 9.

Figure 10.

Figure 11.

Figure 12.

Figure 13.

Figure 14.

Figure 15.

Figure 16.

Figure 17.

Figure 18.

Figure 19.

Figure 20.

Figure 21.

Figure 22.

Figure 23.

Figure 24.

Figure 25.

Figure 26.

Figure 27.

Figure 28.

Figure 29.

Figure 30.

Figure 31.

Figure 32.

Figure 33.

Figure 34.

Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

48-Pin SSOP Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

40-Pin DIP Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

28-Pin SOIC/DIP Pin Assignment—User Mode . . . . . . . . . . . . . . . . 7

Program Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

Standard Z8 Register File (Working Reg. Groups 0–F, Bank 0) . . . 13

Z8 Expanded Register File Architecture . . . . . . . . . . . . . . . . . . . . . 14

Interrupt Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

External Interrupt Sources IRQ0–IRQ2 Block Diagram . . . . . . . . . . 17

IRQ Logic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Interrupt Request Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

General Input/Output Pin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Analog Comparators . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

ADC Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Low-Pass Filter (with 8-MHz Crystal) . . . . . . . . . . . . . . . . . . . . . . . 30

Active Glitch/Power Filter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

I-V Characteristics for the Current Sink Pad P43 . . . . . . . . . . . . . . 34

Counter/Timer Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Prescaler 1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Counter/Timer 1 Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Timer Mode Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Starting the Count . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Counting Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

Timer Mode Register T

OUT

Operation . . . . . . . . . . . . . . . . . . . . . . . 40

Counter/Timer Output Using T

OUT

. . . . . . . . . . . . . . . . . . . . . . . . . 41

Internal Clock Output Using T

OUT

. . . . . . . . . . . . . . . . . . . . . . . . . . 41

Timer Mode Register T

Operation . . . . . . . . . . . . . . . . . . . . . . . . 42

Prescaler 1 T

Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

External Clock Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Gated Clock Input Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Triggered Clock Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44

Counter/Timer Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Transmit Mode Flowchart . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

PS003807-1002

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