Multilayer ceramic capacitors
Array capacitors, C0G
Date:
October 2006
Data Sheet
ã
EPCOS AG 2006. Reproduction, publication and dissemination of this data sheet and the
information contained therein without EPCOS’ prior express consent is prohibited.
Multilayer ceramic capacitors
C0G
Ordering code system
Array
B37830
R
0
101
K
0
2
1
Packaging
1
^
cardboard tape, 180-mm reel
3
^
cardboard tape, 330-mm reel
2
^
2-fold array
4
^
4-fold array
Internal coding: 0
or decimal place for cap. values <10 pF
Capacitance tolerance
J
^
±
5%
K
^
±10%
(standard for C0G)
M
^
±20%
(standard for X7R)
Capacitance,
coded
(example)
100
^
10 · 10
0
pF = 10 pF
101
^
10 · 10
1
pF = 100 pF
220
^
22 · 10
0
pF = 22 pF
16
9
25
0
50
5
Rated voltage
Rated voltage [VDC]
Code
Internal coding
“R“ indicates array capacitor
Type and size
Chip size
(inch / mm)
0405
/ 1012
0508
/ 1220
0612
/ 1632
Temperature characteristic
C0G
X7R
B37830
B37940
B37871
B37831
B37941
B37872
Please read
Cautions and warnings
and
Important notes
at the end of this document.
2
10/06
Multilayer ceramic capacitors
C0G
Features
■
Reduction of mounting time and mounting costs
■
Space saving on the PCB
■
To AEC-Q200
Array
Applications
■
■
■
■
Suitable for electronic circuits with parallel line layout
Coupling and filtering, particularly in RF circuits
Resonant circuits
Filter circuits
Termination
■
For soldering: Nickel barrier terminations (Ni)
Options
■
Alternative capacitance tolerances available on request
Delivery mode
■
Cardboard tape,180-mm and 330-mm reel available
Electrical data
Temperature characteristic
Climatic category (IEC 60068-1)
Standard
Dielectric
Rated voltage
Test voltage
Capacitance range / E series
Temperature coefficient
Dissipation factor (limit value)
Insulation resistance
1)
at + 25
°
C
Insulation resistance
1)
at +125
°
C
Time constant
1)
at + 25
°
C
Time constant
1)
at +125
°
C
Operating temperature range
Ageing
C0G
55/125/56
EIA
Class 1
25, 50
2.5 · V
R
/5 s
10 pF … 1.0 nF (E6)
0
±
30 · 10
–6
/K
<1.0 · 10
–3
>10
5
>10
4
>1000
>100
–55 … +125
none
V
R
V
test
C
R
tan
d
R
ins
R
ins
t
t
T
op
VDC
VDC
M
W
M
W
s
s
°
C
1) For C
R
>10 nF the time constant
t
= C · R
ins
is given.
Please read
Cautions and warnings
and
Important notes
at the end of this document.
3
10/06
Multilayer ceramic capacitors
C0G
C0G
Capacitance tolerances
Code letter
Tolerance
J
K
(standard)
±
5%
±
10%
Dimensional drawing
2-fold array (case size 0405)
u
b
4-fold array (case sizes 0508 and 0612)
u
b
s
s
k
k
e
KKE0330-R
e
e
KKE0331-Z
Dimensions (mm)
2-fold array
Case size
l
b
s
k
e
u
(inch)
(mm)
0405
1012
1.37
±
0.15
1.00 +0/–0.15
0.70 max.
0.36
±
0.1
0.64
0.20
±
0.1
4-fold array
0508
1220
2.00
±
0.2
1.25
±
0.15
0.85
±
0.1
0.30
±
0.1
0.50
±
0.1
0.20 +0.3/–0.1
0612
1632
3.20
±
0.2
1.60
±
0.2
0.85
±
0.1
0.40
±
0.15
0.80
±
0.15
0.20 +0.3/–0.1
Tolerances to CECC 32101-801
Please read
Cautions and warnings
and
Important notes
at the end of this document.
4
10/06
Multilayer ceramic capacitors
C0G
Recommended solder pad
2-fold array (case size 0405)
P
D
D
C0G
4-fold array (case sizes 0508 and 0612)
P
A
C
B
C
KKE0302-L
B
A
KKE0309-9
Recommended dimensions (mm) for reflow soldering
Case size
(inch/mm)
0405/1012
0508/1220
0612/1632
Type
2-fold array
4-fold array
4-fold array
A
0.50 …
0.55
0.50 …
0.70
0.70 …
0.90
B
0.45 …
0.50
0.60 …
0.70
0.80 …
1.00
C
1.45 …
1.60
1.60 …
2.10
2.20 …
2.80
D
0.30 …
0.35
0.25 …
0.35
0.30 …
0.40
P
0.64
±
0.10
0.50
±
0.005
0.80
±
0.005
Termination
Termination
(nickel barrier)
Ceramic body
Inner electrode
AgPd
Substrate electrode
Intermediate electrode
External electrode
Ag
Ni
Sn
KKE0366-S-E
Please read
Cautions and warnings
and
Important notes
at the end of this document.
5
10/06
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