OKI Semiconductor
MSM51V16400F
4,194,304-Word
×
4-Bit DYNAMIC RAM : FAST PAGE MODE TYPE
FEDD51V16400F-01
Issue Date: Sep. 29, 2003
DESCRIPTION
The MSM51V16400F is a 4,194,304-word
×
4-bit dynamic RAM fabricated in Oki’s silicon-gate
CMOS technology. The MSM51V16160F achieves high integration, high-speed operation, and
low-power consumption because Oki manufactures the device in a quadruple-layer
polysilicon/double-layer metal CMOS process. The MSM51V16400F is available in a 26/24-pin plastic
TSOP.
FEATURES
·
4,194,304-word
×
4-bit configuration
·
Single 3.3V power supply,
±0.3V
tolerance
·
Input : LVTTL compatible, low input capacitance
·
Output : LVTTL compatible, 3-state
·
Refresh : 4096 cycles/64ms
·
Fast page mode, read modify write capability
·
CAS
before
RAS
refresh, hidden refresh,
RAS-only
refresh capability
· Packages
26/24-pin 300mil plastic TSOP
(
TSOPII26/24-P-300-1.27-K
)
(Product : MSM51V16400F-xxTS-K)
xx indicates speed rank.
PRODUCT FAMILY
Access Time (Max.)
Family
t
RAC
50ns
60ns
70ns
t
AA
25ns
30ns
35ns
t
CAC
13ns
15ns
20ns
t
OEA
13ns
15ns
20ns
Cycle Time
(Min.)
90ns
110ns
130ns
Power Dissipation
Operating
(Max.)
270mW
252mW
234mW
Standby
(Max.)
1.8mW
MSM51V16400F
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FEDD51V16400F-01
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Semiconductor
MSM51V16400F
PIN CONFIGURATION (TOP VIEW)
V
CC
1
DQ1 2
DQ2 3
WE 4
RAS 5
A11R 6
A10R 8
A0 9
A1 10
A2 11
A3 12
V
CC
13
26 V
SS
25 DQ4
24 DQ3
23 CAS
22 OE
21 A9
19 A8
18 A7
17 A6
16 A5
15 A4
14 V
SS
26/24-Pin Plastic TSOP
(K Type)
Pin Name
A0–A9, A10R,A11R
RAS
CAS
DQ1–DQ4
OE
WE
V
CC
V
SS
NC
Function
Address Input
Row Address Strobe
Column Address Strobe
Data Input/Data Output
Output Enable
Write Enable
Power Supply (3.3V)
Ground (0V)
No Connection
Note : The same power supply voltage must be provided to every V
CC
pin, and the same GND voltage level must
be provided to every V
SS
pin.
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FEDD51V16400F-01
1
Semiconductor
MSM51V16400F
BLOCK DIAGRAM
RAS
CAS
Timing
Generator
Timing
Generator
10
Column
Address
Buffers
Internal
Address
Counter
10
Column Decoders
Write
Clock
Generator
WE
OE
4
Output
Buffers
4
4
4
Input
Buffers
4
A0
−
A9
Refresh
Control Clock
Sense Amplifiers
4
I/O
Selector
4
DQ1
−
DQ
4
10
A10R , A11R
2
Row
Address
Buffers
12
Row
Deco-
ders
Word
Drivers
Memory
Cells
V
CC
On Chip
V
BB
Generator
V
SS
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FEDD51V16400F-01
1
Semiconductor
MSM51V16400F
ELECTRICAL CHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Parameter
Voltage on Any Pin Relative to V
SS
Voltage V
CC
Supply relative to V
SS
Short Circuit Output Current
Power Dissipation
Operating Temperature
Storage Temperature
Symbol
V
IN
, V
OUT
V
CC
I
OS
P
D*
T
opr
T
stg
Value
–0.5 to V
CC
+ 0.5
–0.5 to 4.6
50
1
0 to 70
–55 to 150
Unit
V
V
mA
W
°C
°C
*: Ta = 25°C
RECOMMENDED OPERATIING CONDITIONS
(Ta = 0 to 70°C)
Parameter
Power Supply Voltage
Input High Voltage
Input Low Voltage
Symbol
V
CC
V
SS
V
IH
V
IL
Min.
3.0
0
2.0
−
0.3
*2
Typ.
3.3
0
Max.
3.6
0
V
CC
+ 0.3
*1
0.8
Unit
V
V
V
V
Notes: *1. The input voltage is V
CC
+ 1.0V when the pulse width is less than 20ns (the pulse width is with respect
to the point at which V
CC
is applied).
*2. The input voltage is V
SS
−
1.0V when the pulse width is less than 20ns (the pulse width respect to the
point at which V
SS
is applied).
PIN CAPACITANCE
(Vcc = 3.3V
±
0.3V, Ta = 25°C, f = 1 MHz)
Parameter
Input Capacitance (A0 – A9, A10R, A11R)
Input Capacitance
(RAS,
CAS, WE, OE)
Output Capacitance (DQ1 – DQ4)
Symbol
C
IN1
C
IN2
C
I/O
Min.
—
—
—
Max.
5
7
7
Unit
pF
pF
pF
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FEDD51V16400F-01
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Semiconductor
MSM51V16400F
DC CHARACTERISTICS
(V
CC
= 3.3V
±
0.3V, Ta = 0 to 70°C)
MSM51V16400 MSM51V16400 MSM51V16400
F-50
F-60
F-70
Unit Note
Min.
Output High Voltage
Output Low Voltage
Input Leakage
Current
Output Leakage
Current
Average Power
Supply Current
(Operating)
Power Supply
Current
(Standby)
Average Power
Supply Current
(RAS-only Refresh)
Power Supply
Current
(Standby)
Average Power
Supply Current
(CAS before
RAS
Refresh)
Average Power
Supply Current
(Fast Page Mode)
V
OH
V
OL
I
OH
=
−2.0mA
I
OL
= 2.0mA
0V
≤
V
I
≤
V
CC
+ 0.3V;
I
LI
All other pins not
under test = 0V
DQ disable
0V
≤
V
O
≤
V
CC
RAS, CAS
cycling,
t
RC
= Min.
RAS, CAS
= V
IH
I
CC2
RAS, CAS
≥
V
CC
−
0.2V
RAS
cycling,
I
CC3
CAS
= V
IH
,
t
RC
= Min.
RAS
= V
IH
,
I
CC5
CAS
= V
IL
,
DQ = enable
RAS
= cycling,
CAS
before
RAS
RAS
= V
IL
,
I
CC7
CAS
cycling,
t
PC
= Min.
70
65
60
mA
1,3
5
5
5
mA
1
75
70
65
mA
1,2
−
10
10
−
10
10
−
10
10
µA
2.4
0
Max.
V
CC
0.4
Min.
2.4
0
Max.
V
CC
0.4
Min.
2.4
0
Max.
V
CC
0.4
V
V
Parameter
Symbol
Condition
I
LO
−
10
10
−
10
10
−
10
10
µA
I
CC1
75
70
65
mA
1,2
2
0.5
2
0.5
2
mA
0.5
1
I
CC6
75
70
65
mA
1,2
Notes: 1. I
CC
Max. is specified as I
CC
for output open condition.
2. The address can be changed once or less while
RAS
= V
IL
.
3. The address can be changed once or less while
CAS
= V
IH
.
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