Philips Semiconductors
Product specification
2.5V/3.3V 1-to-4 address register/driver (3-State)
74ALVT16731
FEATURES
•
5V I/O Compatible
•
3-State outputs
•
Output capability: +64 mA/-32 mA
•
Bus-hold data inputs eliminate the need for external pull-up
•
Live insertion/extraction permitted
•
Power-up reset
•
Power-up 3-State
•
Positive edge triggered registers
•
Latch-up protection exceeds 500 mA per JEDEC JC40.2 Std 17
•
ESD protection exceeds 2000 V per MIL STD 883 Method 3015
•
Bus hold data inputs eliminate the need for external pull-up
resistors to hold unused inputs
and 200 V per machine model
resistors to hold unused inputs
DESCRIPTION
The 74ALVT16731 is a high-performance BiCMOS product designed
for V
CC
operation at 2.5V to 3.3V with I/O compatibility up to 5V.
This device is a 1-to-4 address register/driver featuring non-inverting
3-State outputs. The state of the outputs are controlled by two
enable inputs (OE1 and OE2). Each enable input controls the state
of two of the four common outputs for each input. When an OEn
input is a logic High, the respective outputs will be in the high
impedance state. When an OEn input is a logic Low, the respective
outputs are active. The device can be configured for a transparent
mode from input to output or a register mode by the SEL input.
When SEL is a logic High the device is configured for transparent
mode and when SEL is a logic Low it is configured for register
mode. While in the register mode the output follows the input on the
rising edge of the CLK input. The function of the data registers is not
effected by either SEL or OEn.
QUICK REFERENCE DATA
SYMBOL
t
PLH
t
PHL
C
IN
C
OUT
I
CCZ
PARAMETER
Propagation delay
nAx to nYx
Input capacitance
Output capacitance
Total supply current
CONDITIONS
T
amb
= 25°C; GND = 0V
C
L
= 50pF
V
I
= 0V or V
CC
Outputs disabled; V
O
= 0V or V
CC
Outputs disabled
TYPICAL
UNIT
2.5V
3.1
2.3
4
9
40
3.3V
2.1
1.8
4
9
70
ns
pF
pF
µA
ORDERING INFORMATION
PACKAGES
56-Pin Plastic SSOP Type III
56-Pin Plastic TSSOP Type II
TEMPERATURE RANGE
–40°C to +85°C
–40°C to +85°C
OUTSIDE NORTH AMERICA
74ALVT16731 DL
74ALVT16731 DGG
NORTH AMERICA
AV16731 DL
AV16731 DGG
DWG NUMBER
SOT371-1
SOT364-1
PIN DESCRIPTION
PIN NUMBER
1, 4, 19, 25, 28, 32, 38, 41, 47, 53
5, 6, 23, 24, 30, 31, 36, 37, 42, 43,
48, 49, 54, 55
2, 3, 20, 21, 26, 27, 33, 34, 39, 40,
45, 46, 51, 52
7, 22, 29, 35, 44, 50, 56
8, 9, 10, 15, 16, 17, 18
14
11
12, 13
SYMBOL
GND
1Y
n
, 2Y
n
3Y
n
,4Y
n
V
CC
A
n
SEL
CLK
OE
n
Ground
Output, controlled by OE1
Output, controlled by OE2
Positive power supply
Data inputs
Select input, controls mode of device
Clock input
Output enable
NAME AND FUNCTION
1999 Mar 30
2
853-2145 21078
Philips Semiconductors
Product specification
2.5V/3.3V 1-to-4 address register/driver (3-State)
74ALVT16731
ABSOLUTE MAXIMUM RATINGS
1, 2
SYMBOL
V
CC
I
IK
V
I
I
OK
V
OUT
I
OUT
T
stg
PARAMETER
DC supply voltage
DC input diode current
DC input voltage
3
DC output diode current
DC output voltage
3
DC output current
out ut
Storage temperature range
V
O
< 0
Output in Off or High state
Output in Low state
Output in High state
V
I
< 0
CONDITIONS
RATING
-0.5 to +4.6
-50
-0.5 to +7.0
-50
-0.5 to +7.0
128
-64
-65 to +150
UNIT
V
mA
V
mA
V
mA
°C
NOTES:
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction
temperatures which are detrimental to reliability. The maximum junction temperature of this integrated circuit should not exceed 150°C.
3. The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed.
RECOMMENDED OPERATING CONDITIONS
SYMBOL
V
CC
V
I
V
IH
V
IL
I
OH
I
OL
∆t/∆v
T
amb
DC supply voltage
Input voltage
High-level input voltage
Input voltage
High-level output current
Low-level output current
Low-level output current; current duty cycle
≤
50%; f
≥
1kHz
Input transition rise or fall rate; Outputs enabled
Operating free-air temperature range
–40
PARAMETER
2.5V RANGE LIMITS
MIN
2.3
0
1.7
0.7
–8
8
24
10
+85
–40
MAX
2.7
5.5
3.3V RANGE LIMITS
MIN
3.0
0
2.0
0.8
–32
32
64
10
+85
MAX
3.6
5.5
UNIT
V
V
V
V
mA
mA
ns/V
°C
1999 Mar 30
4
Philips Semiconductors
Product specification
2.5V/3.3V 1-to-4 address register/driver (3-State)
74ALVT16731
DC ELECTRICAL CHARACTERISTICS (3.3V
"0.3V
RANGE)
LIMITS
SYMBOL
V
IK
V
OH
PARAMETER
Input clamp voltage
High-level out ut voltage
output
TEST CONDITIONS
V
CC
= 3.0V; I
IK
= –18mA
V
CC
= 3.0 to 3.6V; I
OH
= –100µA
V
CC
= 3.0V; I
OH
= –32mA
V
CC
= 3.0V; I
OL
= 100µA
V
OL
Low–level out ut voltage
output
V
CC
= 3.0V; I
OL
= 16mA
V
CC
= 3.0V; I
OL
= 32mA
V
CC
= 3.0V; I
OL
= 64mA
V
RST
Power-up output low voltage
6
V
CC
= 3.6V; I
O
= 1mA; V
I
= V
CC
or GND
V
CC
= 3.6V; V
I
= V
CC
or GND
I
I
In ut
Input leakage current
V
CC
= 0 or 3.6V; V
I
= 5.5V
V
CC
= 3.6V; V
I
= V
CC
V
CC
= 3.6V; V
I
= 0
I
OFF
I
HOLD
Off current
Bus Hold current
Data in uts
7
inputs
Current into an output in the
High state when V
O
> V
CC
Power up/down 3-State output
current
3
3-State output High current
3-State output Low current
Quiescent supply current
Additional supply current per
input pin
2
V
CC
= 0V; V
I
or V
O
= 0 to 4.5V
V
CC
= 3V; V
I
= 0.8V
V
CC
= 3V; V
I
= 2.0V
V
CC
= 0V to 3.6V; V
CC
= 3.6V
V
O
= 5.5V; V
CC
= 3.0V
V
CC
≤
1.2V; V
O
= 0.5V to V
CC
; V
I
= GND or V
CC
OE/OE = Don’t care
V
CC
= 3.6V; V
O
= 3.0V; V
I
= V
IL
or V
IH
V
CC
= 3.6V; V
O
= 0.5V; V
I
= V
IL
or V
IH
V
CC
= 3.6V; Outputs High, V
I
= GND or V
CC,
I
O
= 0
V
CC
= 3.6V; Outputs Low, V
I
= GND or V
CC,
I
O
= 0
V
CC
= 3.6V; Outputs Disabled; V
I
= GND or V
CC,
I
O
=
V
CC
= 3V to 3.6V; One input at V
CC
–0.6V,
Other inputs at V
CC
or GND
0
5
75
–75
±500
10
1
0.5
0.5
0.05
7.0
0.06
0.04
125
±100
5
–5
0.1
9.0
0.1
0.4
mA
mA
µA
µA
µA
µA
Data pins
4
ins
Control pins
0.1
0.1
0.5
0.1
0.1
130
–225
µA
V
CC
–0.2
2.0
Temp = -40°C to +85°C
MIN
TYP
1
–0.85
V
CC
2.3
0.07
0.25
0.3
0.4
0.2
0.4
0.5
0.55
0.55
±1
10
1
-5
±100
µA
µA
V
V
MAX
–1.2
V
V
UNIT
I
EX
I
PU/PD
I
OZH
I
OZL
I
CCH
I
CCL
I
CCZ
∆I
CC
NOTES:
1. All typical values are at V
CC
= 3.3V and T
amb
= 25°C.
2. This is the increase in supply current for each input at the specified voltage level other than V
CC
or GND
3. This parameter is valid for any V
CC
between 0V and 1.2V with a transition time of up to 10msec. From V
CC
= 1.2V to V
CC
= 3.3V
±
0.3V a
transition time of 100µsec is permitted. This parameter is valid for T
amb
= 25°C only.
4. Unused pins at V
CC
or GND.
5. I
CCZ
is measured with outputs pulled up to V
CC
or pulled down to ground.
6. For valid test results, data must not be loaded into the flip-flops (or latches) after applying power.
7. This is the bus hold overdrive current required to force the input to the opposite logic state.
1999 Mar 30
5
FPGA/CPLD
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