ATT3064-70J68I datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > ATT3064-70J68I

Preview

ATT3064-70J68I: DescriptionField-Programmable Gate Arrays; File Size519KB，80 Pages; ManufacturerETC

Download Datasheet View All

ATT3064-70J68I Overview

Field-Programmable Gate Arrays

Preview

Download Datasheet

View All

Data Sheet

February 1997

ATT3000 Series Field-Programmable Gate Arrays

Features

Description

The CMOS ATT3000 Series Field-Programmable

Gate Array (FPGA) family provides a group of high-

density, digital integrated circuits. Their regular,

extendable, ﬂexible, user-programmable array

architecture is composed of a conﬁguration program

store plus three types of conﬁgurable elements: a

perimeter of I/O blocks, a core array of logic blocks,

and resources for interconnection. The general struc-

ture of an FPGA is shown in Figure 1.

The

ORCA

Foundry for ATT3000 Development Sys-

tem provides automatic place and route of netlists.

Logic and timing simulation are available as design

veriﬁcation alternatives. The design editor is used for

interactive design optimization and to compile the

data pattern that represents the conﬁguration pro-

gram.

The FPGA’s user-logic functions and interconnec-

tions are determined by the conﬁguration program

data stored in internal static memory cells. The pro-

gram can be loaded in any of several modes to

accommodate various system requirements. The

program data resides externally in an EEPROM,

EPROM, or ROM on the application circuit board, or

on a ﬂoppy disk or hard disk. On-chip initialization

logic provides for optional automatic loading of pro-

gram data at powerup. A serial conﬁguration PROM

can provide a very simple serial conﬁguration pro-

gram storage.

Xilinx, XC3000,

and

XC3100

are registered trademarks of

Xilinx, Inc.

High performance:

— Up to 270 MHz toggle rates

— 4-input LUT delays <2.7 ns

User-programmable gate arrays

— Unlimited reprogrammability

— Easy design iteration through in-system

logic changes

Flexible array architecture:

— Compatible arrays ranging from 1500 to

6000 gate logic complexity

— Extensive register, combinatorial, and I/O

capabilities

— Low-skew clock nets

— High fan-out signal distribution

— Internal 3-state bus capabilities

— TTL or CMOS input thresholds

— On-chip oscillator ampliﬁer

Standard product availability:

— Low-power 0.55 µm CMOS, static memory

technology

— Pin-for-pin compatible with

Xilinx* XC3000*

and

XC3100*

families

— Cost-effective for volume production

— 100% factory pretested

— Selectable conﬁguration modes

ORCA™

Foundry for ATT3000 Development

System support

All FPGAs processed on a QML-certiﬁed line

Extensive packaging options

Table 1. ATT3000 Series FPGAs

FPGA

ATT3020

ATT3030

ATT3042

ATT3064

ATT3090

Max

Logic

Gates

1,500

2,000

3,000

4,500

6,000

Typical Gate

Range

1,000—1,500

1,500—2,000

2,000—3,000

3,500—4,500

5,000—6,000

Conﬁgurable

Logic

Blocks

100

144

224

320

Array

8x8

10 x 10

12 x 12

16 x 14

20 x 16

User I/Os

Max

120

144

Flip-

Flops

256

360

480

688

928

Horizontal

Long Lines

Conﬁguration

Data Bits

14,779

22,176

30,784

46,064

64,160

Recommended Resources

Some notes on electronic design

Duplex intercom amplifier multi-purpose machine

music table lamp

400HZ drive circuit diagram

Infrared remote control electric fan circuit

Cadmium nickel battery constant current fast charger circuit (for walkie-talkies)

【TI Suggestions】A few personal suggestions on the construction of this version...: 1. Hope the forum can develop a complete system kit.A while ago, many TI development boards were promoted in the forum, such as 8962 and 811 , and group purchases of MSP430 . These activities have tau...; youki12345 Microcontroller MCU

【TI recommended course】#What is I2C design tool? #: //training.eeworld.com.cn/TI/show/course/5701...; xscc TI Technology Forum

What is the relationship between the microcontroller baud rate, crystal oscillator and main frequency?: What is the relationship between the microcontroller baud rate, crystal oscillator and main frequency?...; QWE4562009 Discrete Device

9b96 version problem?: What is the difference between the C1 and C3 versions in 9b96? What does IQC80C3XD $A-14P038H on the chip mean?...; jxndcl301 Microcontroller MCU

STM32F103ADC+DMA and UART2 interrupt conflict problem: The program uses TIM2, UART1, UART2 and ADC+DMA1 interrupts. It works fine without UART2. After adding UART2 interrupt, ADC+DMA1 interrupt cannot be entered after running for a few minutes. After chan...; rto.wang stm32/stm8

lm3s101 jtag is locked, please help: There is a problem with the jtag port. I accidentally connected the pull-up resistor on pc0 of the jtag port to pc3. Will it cause the chip to deadlock or be damaged? How can I solve this problem? Now...; sciencekn1 Microcontroller MCU

Shortcut: 00 01 02 03 04 05 06 07 08 09 0A 0C 0F 0J 0L 0M 0R 0S 0T 0Z 10 11 12 13 14 15 16 17 18 19 1A 1B 1C 1D 1E 1F 1H 1K 1M 1N 1P 1S 1T 1V 1X 1Z 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 2G 2K 2M 2N 2P 2Q 2R 2S 2T 2W 2Z 30 31 32 33 34 35 36 37 38 39 3A 3B 3C 3D 3E 3F 3G 3H 3J 3K 3L 3M 3N 3P 3R 3S 3T 3V 40 41 42 43 44 45 46 47 48 49 4A 4B 4C 4D 4M 4N 4P 4S 4T 50 51 52 53 54 55 56 57 58 59 5A 5B 5C 5E 5G 5H 5K 5M 5N 5P 5S 5T 5V 60 61 62 63 64 65 66 67 68 69 6A 6C 6E 6F 6M 6N 6P 6R 6S 6T 70 71 72 73 74 75 76 77 78 79 7A 7B 7C 7M 7N 7P 7Q 7V 7W 7X 80 81 82 83 84 85 86 87 88 89 8A 8D 8E 8L 8N 8P 8S 8T 8W 8Y 8Z 90 91 92 93 94 95 96 97 98 99 9A 9B 9C 9D 9F 9G 9H 9L 9S 9T 9W

Popular Components