FEDL7022-01-06
1
Semiconductor
ML7022-01
Single Rail Dual Channel PCM CODEC
This version:
May 2000
Previous version: Sep. 1999
GENERAL DESCRIPTION
The ML7022 is a two-channel single-rail CODEC CMOS IC for voice signals ranging from 300 to 3400Hz. This
device contains two-channel analog-to-digital (A/D) and digital-to-analog (D/A) converters on a single chip. The
ML7022 is designed especially for a single power supply and low power applications and achieves a reduced
footprint.
The ML7022 is best suited for line card applications with easy interface to subscriber line interface circuits
(SLICs). The SLIC interface latches are embedded onto this CODEC, thus eliminating the need for external
components and optimizing board space.
FEATURES
•
Single 5 V Power Supply Operation
•
Using
∆-Σ
ADC and DAC Technique
•
Low Power Consumption
2-Channel Operating Mode:
typical: 70 mW
max.: 90 mW
1-Channel Operating Mode:
typical: 40 mW
max.: 55 mW
Power Saving Mode: (CPD1 = CPD2 = “0”)
typical:
9 mW
max.: 12.5 mW
Power Down Mode: (PDN = “0”)
typical: 0.05 mW
max.: 0.25 mW
•
ITU-T Companding Law -
µ-law
•
Built-in Dual 3-bit Latches with CMOS Drive Capability
•
Serial PCM Interface
•
Master Clock: 4.096 MHz
•
Transmission Clocks:
256 to 4096 kbps
•
Adjustable Transmit Gain
•
Built-in Reference Voltage Supply
•
Analog Output can Directly Drive a 600Ω Line Transformer
•
Latched Content Echo-back Function
•
Package Type:
30-pin plastic SSOP (SSOP30-P-56-0.65-K) (Product name: ML7022-01MB)
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FEDL7022-01-06
1
Semiconductor
ML7022-01
PIN DESCRIPTIONS
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
Symbol
V
DD
TEST1
TEST2
AIN1
GSX1
AOUT1
TEST3
AG
SGC
AOUT2
GSX2
AIN2
TEST4
TEST5
V
DD
TEST6
C1B
C2B
C3B
MCK
BCLK
DIN
DOUT
DG
XSYNC
RSYNC
C3A
C2A
C1A
PDN
Type
—
I
I
I
O
O
I
—
O
O
O
I
I
I
—
I
O
O
O
I
I
I
O
—
I
I
O
O
O
I
Power Supply *
Device Test Pin 1
Device Test Pin 2
Channel-1 Transmit Op-amp Input
Channel-1 Transmit Op-amp Output
Channel-1 Receive Output
Device Test Pin 3
Analog Ground
Signal Ground
Channel-2 Receive Output
Channel-2 Transmit Op-amp Output
Channel-2 Transmit Op-amp Input
Device Test Pin 4
Device Test Pin 5
Power Supply *
Device Test Pin 6
C1B Bit Latched Output
C2B Bit Latched Output
C3B Bit Latched Output
Master Clock (4.096 MHz)
Shift Clock for the DIN and DOUT
Data Input
Data Output
Digital Ground
Transmit Synchronizing Signal
Receive Synchronizing Signal
C3A Bit Latched Output
C2A Bit Latched Output
C1A Bit Latched Output
Power Down Control
Description
* V
DD
of pin 1 and V
DD
of pin 15 are connected internally, but these pins must be connected on the printed
circuit board.
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FEDL7022-01-06
1
Semiconductor
ML7022-01
ABSOLUTE MAXIMUM RATINGS
Parameter
Power Supply Voltage
Analog Input Voltage
Digital Input Voltage
Storage Temperature
Symbol
V
DD
V
AIN
V
DIN
T
STG
Condition
—
—
—
—
Rating
–0.3 to +7.0
–0.3 to V
DD
+0.3
–0.3 to V
DD
+0.3
–55 to +150
Unit
V
V
V
°C
RECOMMENDED OPERATING CONDITIONS
Parameter
Power Supply Voltage
Operating Temperature
Analog Input Voltage
High Level Input Voltage
Low Level Input Voltage
MCK Frequency
BCLK Frequency
Sync Pulse Frequency
Clock Duty Ratio
Digital Input Rise Time
Digital Input Fall Time
MCK to BCLK Phase
Difference
Transmit Sync Pulse Setting
Time
Receive Sync Pulse Setting
Time
Sync Pulse Width
DIN Set-up Time
DIN Hold Time
Digital Output Load
Bypass Capacitor for SGC
Symbol
V
DD
T
OP
V
AIN
V
IH
V
IL
F
MCK
F
BCLK
F
SYNC
D
CLK
T
IR
T
IF
T
MB
T
XS
T
SX
T
RS
T
SR
T
WS
T
DS
T
DH
R
DL
C
DL
C
SG
Condition
Voltage must be fixed
—
Gain = 1
All Digital Input Pins
MCK
BCLK
XSYNC, RSYNC
MCK, BCLK
All Digital Input Pins
MCK, BCLK
BCLK to XSYNC
XSYNC to BCLK
BCLK to RSYNC
RSYNC to BCLK
XSYNC, RSYNC
DIN
DIN
Pull-up Resistor, DOUT
DOUT
C1A, C2A, C3A,C1B, C2B, C3B
SG to AG
Min.
4.75
–40
—
2.2
0
–0.01%
256
—
40
—
—
—
50
50
50
50
1 BCLK
50
50
0.5
—
—
0.1
Typ.
5.0
—
—
—
—
4096
—
8
50
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
5.25
+85
3.4
V
DD
0.8
+0.01%
4096
—
60
50
50
50
—
—
—
—
100
—
—
—
50
50
—
Unit
V
°C
V
PP
V
V
kHz
kHz
kHz
%
ns
ns
ns
ns
ns
ns
ns
µs
ns
ns
kΩ
pF
pF
µF
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Embedded System
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