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ATF22V10B-10NM/883

Description
FLASH PLD, 20 ns, CDIP24
CategoryProgrammable logic devices    Programmable logic   
File Size605KB,14 Pages
ManufacturerAtmel (Microchip)
Download Datasheet Parametric View All

ATF22V10B-10NM/883 Overview

FLASH PLD, 20 ns, CDIP24

ATF22V10B-10NM/883 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerAtmel (Microchip)
Parts packaging codeQLCC
package instructionCERAMIC, LCC-28
Contacts28
Reach Compliance Codeunknow
ECCN code3A001.A.2.C
Other features10 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK; VARIABLE PRODUCT TERMS
ArchitecturePAL-TYPE
maximum clock frequency90 MHz
JESD-30 codeS-CQCC-N28
JESD-609 codee0
length11.45 mm
Dedicated input times11
Number of I/O lines10
Number of entries22
Output times10
Number of product terms132
Number of terminals28
Maximum operating temperature125 °C
Minimum operating temperature-55 °C
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialCERAMIC, METAL-SEALED COFIRED
encapsulated codeQCCN
Encapsulate equivalent codeLCC28,.45SQ
Package shapeSQUARE
Package formCHIP CARRIER
Peak Reflow Temperature (Celsius)225
power supply5 V
Programmable logic typeFLASH PLD
propagation delay10 ns
Certification statusNot Qualified
Filter levelMIL-STD-883
Maximum seat height2.54 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountYES
technologyCMOS
Temperature levelMILITARY
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperatureNOT SPECIFIED
width11.45 mm
Features
Industry Standard Architecture
– Low Cost Easy-to-Use Software Tools
High-Speed, Electrically-Erasable Programmable Logic Devices
– 7.5 ns Maximum Pin-to-Pin Delay
Several Power Saving Options
Device
ATF22V10B
ATF22V10BQ
ATF22V10BQL
I
CC
, Stand-By
85 mA
35 mA
5 mA
I
CC
, Active
90 mA
40 mA
20 mA
CMOS and TTL Compatible Inputs and Outputs
– Input and I/O Pull-Up Resistors
Advanced Flash Technology
– Reprogrammable
– 100% Tested
High Reliability CMOS Process
– 20 Year Data Retention
– 100 Erase/Write Cycles
– 2,000V ESD Protection
– 200 mA Latchup Immunity
Full Military, Commercial, and Industrial Temperature Ranges
Dual-in-Line and Surface Mount Packages in Standard Pinouts
High-
Performance
EE PLD
ATF22V10B
Logic Diagram
TSSOP Top View
Pin Configurations
Pin Name
CLK
Function
Clock
IN
I/O
*
V
CC
Logic Inputs
Bidirectional Buffers
No Internal Connection
+5V Supply
CLK/IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
IN
GND
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
IN
DIP/SOIC
LCC/PLCC
Rev. 0250F–05/98
Top View
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