8th Generation Intel
®
Processor
Family for S-Processor Platforms
Datasheet, Volume 1 of 2
October 2017
Revision 001
Document Number: 336464-001
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Datasheet, Volume 1 of 2
Contents
1
Introduction
............................................................................................................ 10
1.1
Supported Technologies ..................................................................................... 12
1.2
Power Management Support ............................................................................... 12
1.2.1 Processor Core Power Management........................................................... 12
1.2.2 System Power Management ..................................................................... 13
1.2.3 Memory Controller Power Management...................................................... 13
1.2.4 Processor Graphics Power Management ..................................................... 13
1.2.4.1 Memory Power Savings Technologies ........................................... 13
1.2.4.2 Display Power Savings Technologies ............................................ 13
1.2.4.3 Graphics Core Power Savings Technologies................................... 13
1.3
Thermal Management Support ............................................................................ 14
1.4
Package Support ............................................................................................... 14
1.5
Ballout Information............................................................................................ 14
1.6
Processor Testability .......................................................................................... 14
1.7
Terminology ..................................................................................................... 14
1.8
Related Documents ........................................................................................... 16
Interfaces................................................................................................................
18
2.1
System Memory Interface .................................................................................. 18
2.1.1 System Memory Technology Supported ..................................................... 18
2.1.1.1 DDR4 Supported Memory Modules and Devices............................. 19
2.1.2 System Memory Timing Support............................................................... 20
2.1.3 System Memory Organization Modes......................................................... 20
2.1.4 System Memory Frequency...................................................................... 22
2.1.5 Technology Enhancements of Intel
®
Fast Memory Access (Intel
®
FMA).......... 22
2.1.6 Data Scrambling .................................................................................... 22
2.1.7 DDR I/O Interleaving .............................................................................. 23
2.1.8 Data Swapping ...................................................................................... 24
2.1.9 DRAM Clock Generation........................................................................... 24
2.1.10 DRAM Reference Voltage Generation ......................................................... 24
2.1.11 Data Swizzling ....................................................................................... 24
2.2
PCI Express* Graphics Interface (PEG)................................................................. 24
2.2.1 PCI Express* Support ............................................................................. 24
2.2.2 PCI Express* Architecture ....................................................................... 26
2.2.3 PCI Express* Configuration Mechanism ..................................................... 27
2.2.4 PCI Express* Equalization Methodology ..................................................... 27
2.3
Direct Media Interface (DMI)............................................................................... 28
2.3.1 DMI Lane Reversal and Polarity Inversion .................................................. 28
2.3.2 DMI Error Flow....................................................................................... 29
2.3.3 DMI Link Down ...................................................................................... 29
2.4
Processor Graphics ............................................................................................ 30
2.4.1 Operating Systems Support ..................................................................... 30
2.4.2 API Support (Windows*) ......................................................................... 30
2.4.3 Media Support (Intel
®
QuickSync & Clear Video Technology HD)................... 31
2.4.3.1 Hardware Accelerated Video Decode ............................................ 31
2.4.3.2 Hardware Accelerated Video Encode ............................................ 32
2.4.3.3 Hardware Accelerated Video Processing ....................................... 32
2.4.3.4 Hardware Accelerated Transcoding .............................................. 33
2.4.4 Switchable/Hybrid Graphics ..................................................................... 33
2.4.5 Gen 9 LP Video Analytics ......................................................................... 34
2.4.6 Gen 9 LP (9th Generation Low Power) Block Diagram .................................. 35
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Datasheet, Volume 1 of 2
3
2.5
2.6
3
2.4.7 GT2 Graphic Frequency ...........................................................................35
Display Interfaces ..............................................................................................36
2.5.1 DDI Configuration ...................................................................................36
2.5.2 eDP* Bifurcation .....................................................................................37
2.5.3 Display Technologies ...............................................................................37
2.5.4 DisplayPort* ..........................................................................................40
2.5.5 High-Definition Multimedia Interface (HDMI*).............................................40
2.5.6 Digital Video Interface (DVI) ....................................................................41
2.5.7 embedded DisplayPort* (eDP*) ................................................................41
2.5.8 Integrated Audio ....................................................................................41
2.5.9 Multiple Display Configurations (Dual Channel DDR) ....................................42
2.5.10 Multiple Display Configurations (Single Channel DDR) ..................................43
2.5.11 High-bandwidth Digital Content Protection (HDCP) ......................................43
2.5.12 Display Link Data Rate Support ................................................................44
2.5.13 Display Bit Per Pixel (BPP) Support............................................................45
2.5.14 Display Resolution per Link Width .............................................................45
Platform Environmental Control Interface (PECI) ....................................................45
2.6.1 PECI Bus Architecture..............................................................................45
Technologies............................................................................................................48
3.1
Intel
®
Virtualization Technology (Intel
®
VT) ..........................................................48
3.1.1 Intel
®
Virtualization Technology (Intel
®
VT) for IA-32, Intel
®
64 and Intel
®
Architecture (Intel
®
VT-X)........................................................................48
3.1.2 Intel
®
Virtualization Technology (Intel
®
VT) for Directed I/O (Intel
®
VT-d).....50
3.2
Security Technologies.........................................................................................53
3.2.1 Intel
®
Trusted Execution Technology (Intel
®
TXT) .......................................53
3.2.2 Intel
®
Advanced Encryption Standard New Instructions (Intel
®
AES-NI) .........54
3.2.3 PCLMULQDQ (Perform Carry-Less Multiplication Quad word) Instruction .........54
3.2.4 Intel
®
Secure Key ...................................................................................54
3.2.5 Execute Disable Bit .................................................................................55
3.2.6 Boot Guard Technology ...........................................................................55
3.2.7 Intel
®
Supervisor Mode Execution Protection (SMEP) ...................................55
3.2.8 Intel
®
Supervisor Mode Access Protection (SMAP) .......................................55
3.2.9 Intel
®
Memory Protection Extensions (Intel
®
MPX)......................................56
3.2.10 Intel
®
Software Guard Extensions (Intel
®
SGX) ..........................................56
3.2.11 Intel
®
Virtualization Technology (Intel
®
VT) for Directed I/O (Intel
®
VT-d).....57
3.3
Power and Performance Technologies ...................................................................57
3.3.1 Intel
®
Hyper-Threading Technology (Intel
®
HT Technology) .........................57
3.3.2 Intel
®
Turbo Boost Technology 2.0............................................................57
3.3.2.1 Intel
®
Turbo Boost Technology 2.0 Frequency ...............................58
3.3.3 Intel
®
Advanced Vector Extensions 2 (Intel
®
AVX2) ....................................58
3.3.4 Intel
®
64 Architecture x2APIC ..................................................................59
3.3.5 Power Aware Interrupt Routing (PAIR).......................................................60
3.3.6 Intel
®
Transactional Synchronization Extensions (Intel
®
TSX-NI) ..................60
3.4
Debug Technologies ...........................................................................................60
3.4.1 Intel
®
Processor Trace ............................................................................60
Power Management
.................................................................................................61
4.1
Advanced Configuration and Power Interface (ACPI) States Supported ......................63
4.2
Processor IA Core Power Management ..................................................................65
4.2.1 OS/HW controlled P-states .......................................................................65
4.2.1.1 Enhanced Intel
®
SpeedStep
®
Technology .....................................65
4.2.1.2 Intel
®
Speed Shift Technology ....................................................66
4.2.2 Low-Power Idle States.............................................................................66
4.2.3 Requesting Low-Power Idle States ............................................................67
4.2.4 Processor IA Core C-State Rules ...............................................................67
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Datasheet, Volume 1 of 2
4.3
4.4
4.5
4.6
4.7
5
4.2.5 Package C-States ................................................................................... 69
4.2.6 Package C-States and Display Resolutions ................................................. 72
Integrated Memory Controller (IMC) Power Management ........................................ 72
4.3.1 Disabling Unused System Memory Outputs ................................................ 72
4.3.2 DRAM Power Management and Initialization ............................................... 73
4.3.2.1 Initialization Role of CKE ............................................................ 74
4.3.2.2 Conditional Self-Refresh............................................................. 74
4.3.2.3 Dynamic Power-Down................................................................ 75
4.3.2.4 DRAM I/O Power Management .................................................... 75
4.3.3 DDR Electrical Power Gating (EPG) ........................................................... 75
4.3.4 Power Training....................................................................................... 75
PCI Express* Power Management ........................................................................ 76
Direct Media Interface (DMI) Power Management .................................................. 76
Processor Graphics Power Management ................................................................ 76
4.6.1 Memory Power Savings Technologies ........................................................ 76
4.6.1.1 Intel
®
Rapid Memory Power Management (Intel
®
RMPM) ............... 76
4.6.1.2 Intel
®
Smart 2D Display Technology (Intel
®
S2DDT) ..................... 76
4.6.2 Display Power Savings Technologies ......................................................... 77
4.6.2.1 Intel
®
(Seamless & Static) Display Refresh Rate Switching
(DRRS) with eDP* Port .............................................................. 77
4.6.2.2 Intel
®
Automatic Display Brightness ............................................ 77
4.6.2.3 Smooth Brightness.................................................................... 77
4.6.2.4 Intel
®
Display Power Saving Technology (Intel
®
DPST) 6.0 ............ 77
4.6.2.5 Panel Self-Refresh 2 (PSR 2) ...................................................... 78
4.6.2.6 Low-Power Single Pipe (LPSP) .................................................... 78
4.6.3 Processor Graphics Core Power Savings Technologies .................................. 78
4.6.3.1 Intel
®
Graphics Dynamic Frequency ............................................ 78
4.6.3.2 Intel
®
Graphics Render Standby Technology (Intel
®
GRST) ............ 78
4.6.3.3 Dynamic FPS (DFPS) ................................................................. 79
Voltage Optimization.......................................................................................... 79
Thermal Management
.............................................................................................. 80
5.1
Processor Thermal Management .......................................................................... 80
5.1.1 Thermal Considerations........................................................................... 80
5.1.2 Intel
®
Turbo Boost Technology 2.0 Power Monitoring .................................. 81
5.1.3 Intel
®
Turbo Boost Technology 2.0 Power Control ....................................... 81
5.1.3.1 Package Power Control .............................................................. 81
5.1.3.2 Platform Power Control .............................................................. 82
5.1.3.3 Turbo Time Parameter (Tau) ...................................................... 83
5.1.4 Configurable TDP (cTDP) and Low-Power Mode........................................... 83
5.1.4.1 Configurable TDP ...................................................................... 83
5.1.4.2 Low-Power Mode ...................................................................... 84
5.1.5 Thermal Management Features ................................................................ 84
5.1.5.1 Adaptive Thermal Monitor .......................................................... 85
5.1.5.2 Digital Thermal Sensor .............................................................. 87
5.1.5.3 PROCHOT# Signal..................................................................... 88
5.1.5.4 Bi-Directional PROCHOT# .......................................................... 88
5.1.5.5 Voltage Regulator Protection using PROCHOT# ............................. 88
5.1.5.6 Thermal Solution Design and PROCHOT# Behavior ........................ 89
5.1.5.7 Low-Power States and PROCHOT# Behavior ................................. 89
5.1.5.8 THERMTRIP# Signal .................................................................. 89
5.1.5.9 Critical Temperature Detection ................................................... 89
5.1.5.10 On-Demand Mode ..................................................................... 89
5.1.5.11 MSR Based On-Demand Mode..................................................... 90
5.1.5.12 I/O Emulation-Based On-Demand Mode ....................................... 90
5.1.6 Intel
®
Memory Thermal Management ........................................................ 90
5.2
All-Processor Line Thermal and Power Specifications .............................................. 91
Datasheet, Volume 1 of 2
5
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