531FC1002M00DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > oscillator> 531FC1002M00DG

531FC1002M00DG: DescriptionLVDS Output Clock Oscillator, 1002MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531FC1002M00DG Overview

LVDS Output Clock Oscillator, 1002MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531FC1002M00DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	1002 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Z35 type radial drilling machine electrical schematic circuit

Zero crossing trigger temperature control circuit

JD2A type electrical schematic circuit

Three-limit four-state circuit diagram

trombone circuit

Why a damaged LED can still emit light (picture): Author: Fang Peimin, Beijing University of Aeronautics and Astronautics 　Date: 2007-2-1 　Source: Today's Electronics By chance, the author added a 3.2V forward voltage between the anode and cathode of...; fighting Analog electronics

WCE malloc memory size problem: Today I tried to use malloc to allocate 28M memory in EVC, but it failed. The reason for the failure was: insufficient memory. I checked the memory management information of CE and found that the proc...; liplip Embedded System

Tianjin - Recruiting embedded software and hardware engineers - fresh graduates preferred: Responsible for the development of MCU hardware and software, IoT direction, experience in wireless modules is preferred. Major in electronic information is required, knowledge of STM32 MCU, circuit d...; role_2099 Recruitment

austriamicrosystems 8-channel 8-bit DAC with shutdown and mid-scale reset functions: Austriamicrosystems has launched the AS1504 and AD1505 low-power 8-channel 8- bit digital-to - analog converters ( DACs )with shutdown and mid-scale reset functions.The new components have good integr...; frozenviolet Analogue and Mixed Signal

Understanding the RC circuit waveform in detail: Resistor R and capacitor C are connected in series to input signal VI, and capacitor C outputs signal V0. When the value of RC (τ) satisfies the input square wave width tW: τ>>tW (generally at least 1...; fish001 Analogue and Mixed Signal

Ask a few questions: 1. How to determine whether the NDIS driver is a serialized driver or a non-serialized driver? There is NDIS_ATTRIBUTE_DESERIALIZE when registering NIC in the code, indicating that it is a non-seriali...; mbwr Embedded System

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components