EEWORLDEEWORLDEEWORLD

Part Number

Search

530BC1279M00DG

Description
LVDS Output Clock Oscillator, 1279MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

530BC1279M00DG Overview

LVDS Output Clock Oscillator, 1279MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530BC1279M00DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability7%
JESD-609 codee4
Manufacturer's serial number530
Installation featuresSURFACE MOUNT
Nominal operating frequency1279 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVDS
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Introduction to reversing radar and reversing image system
What is a reversing radar? The driver's field of view is very limited in the driver's seat. The driver's field of view can be greatly improved through the mirrors inside and outside the car, but obsta...
xiaoxin1 Automotive Electronics
Automobile Manufacturing Industry--EAM Successful Application Case
Shanghai Huizhong Automobile Manufacturing Co., Ltd. is a modern large-scale manufacturing enterprise jointly invested by Shanghai Automotive Group Corporation and Shanghai Industrial Group Corporatio...
frozenviolet Automotive Electronics
[MSP430 Sharing] The simplest emulator parallel port emulator
I saw this on the Internet and thought I could make one myself using a perforated board for just a few bucks :victory:...
ddllxxrr Microcontroller MCU
How to modify DRC errors in Allegro
[align=left]In PCB Editor, Setup→Constraints→Constraint Manager, select the DRC type on the left for your DRC error, and then modify the corresponding blue font on the right as needed. [/align][align=...
wstt PCB Design
The BUG of ATMEGA169PA that must be mentioned!
[b]The BUG of ATMEGA169PA that I have to talk about![/b]I have been using the ATMEGA169PA chip for nearly a year and have done a lot of experiments. Recently, when I was doing the pin level change int...
gh131413 Microchip MCU
WinCE 6.0 BSP issue
I took over a development project. The chip used is EBD9315. The original development environment was wince 4.2 and EVC4.0. Now it is wince 6.0 and VS2005. The original DSP can't be used. The project ...
xyer Embedded System

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2271  374  2566  1935  2456  46  8  52  39  50 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号