R1LV1616H-I Series
Wide Temperature Range Version
16 M SRAM (1-Mword
×
16-bit / 2-Mword
×
8-bit)
REJ03C0195-0101
Rev.1.01
Nov.18.2004
Description
The R1LV1616H-I Series is 16-Mbit static RAM organized 1-Mword
×
16-bit / 2-Mword
×
8-bit.
R1LV1616H-I Series has realized higher density, higher performance and low power consumption by
employing CMOS process technology (6-transistor memory cell). It offers low power standby power
dissipation; therefore, it is suitable for battery backup systems. It is packaged in 48-pin plastic TSOPI for
high density surface mounting.
Features
•
Single 3.0 V supply: 2.7 V to 3.6 V
•
Fast access time: 45/55 ns (max)
•
Power dissipation:
Active: 9 mW/MHz (typ)
Standby: 1.5
µW
(typ)
•
Completely static memory.
No clock or timing strobe required
•
Equal access and cycle times
•
Common data input and output.
Three state output
•
Battery backup operation.
2 chip selection for battery backup
•
Temperature range:
−40
to +85°C
•
Byte function (×8 mode) available by BYTE# & A-1.
Rev.1.01, Nov.18.2004, page 1 of 19
R1LV1616H-I Series
Ordering Information
Type No.
R1LV1616HSA-4LI
R1LV1616HSA-4SI
R1LV1616HSA-5SI
Access time
45 ns
45 ns
55 ns
Package
48-pin plastic TSOPI (48P3R-B)
Rev.1.01, Nov.18.2004, page 2 of 19
R1LV1616H-I Series
Pin Description
(TSOP)
Pin name
A0 to A19
A-1 to A19
I/O0 to I/O15
CS1# (CS1)
CS2
WE# (WE)
OE# (OE)
LB# (LB)
UB# (UB)
BYTE# (BYTE)
V
CC
V
SS
NC
NU*
1
Function
Address input (word mode)
Address input (byte mode)
Data input/output
Chip select 1
Chip select 2
Write enable
Output enable
Lower byte select
Upper byte select
Byte enable
Power supply
Ground
No connection
Not used (test mode pin)
Note: 1. This pin should be connected to a ground (V
SS
), or not be connected (open).
Rev.1.01, Nov.18.2004, page 4 of 19
R1LV1616H-I Series
Block Diagram (TSOP)
LSB
A15
A14
A13
A12
A11
A10
A9
A8
A18
A16
A19
A4
A5
V
CC
V
SS
Row
decoder
•
•
•
•
•
Memory matrix
8,192 x 128 x 16
8,192 x 256 x 8
MSB
I/O0
Input
data
control
I/O15
•
•
Column I/O
Column decoder
•
•
MSBA17 A7A6 A3 A2 A1A0 A-1 LSB
•
•
BYTE#
CS2
CS1#
LB#
UB#
WE#
OE#
Control logic
Rev.1.01, Nov.18.2004, page 5 of 19