531BB1387M00DGR datasheet, PDF

Datasheet> All Categories > oscillator> 531BB1387M00DGR

531BB1387M00DGR: DescriptionLVDS Output Clock Oscillator, 1387MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; Categoryoscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531BB1387M00DGR Overview

LVDS Output Clock Oscillator, 1387MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531BB1387M00DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	1387 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVDS
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)
Base Number Matches	1

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Why should we pay attention to the power supply noise problem? What are the factors that cause power supply noise?

common collector circuit

Transistor AC Voltage Regulator Circuit

Portable Hypoxia Monitoring Circuit

Four independent hand touch switch circuit

LED signal amplifier circuit

Help with Bluetooth issues with CSR ROM version under CE5.0: How to load BTAGSVC.Dll? I added the following to the registry: [HKEY_LOCAL_MACHINE\Services\BTAGSVC] "FriendlyName"="Bluetooth Audio Gateway" "Dll"="BTAGSVC.Dll" "Order"=dword:9 "Keep"=dword:1 "Prefi...; gf0608 Embedded System

[MM32 eMiniBoard Review] + Reunion with Smart Development Board: [i=s]This post was last edited by jinglixixi on 2020-10-28 08:40[/i]My first encounter with the Lingdong development board was with the MM32L073, and it was a great honor to meet the MM32F0133 again t...; jinglixixi Domestic Chip Exchange

[2022 Digi-Key Innovation Design Competition] Home Smart Dashboard - LVGL transplantation and testing: * Get the SDK of esp32-s2-kaluga-1 ```bash git clone https://github.com/espressif/esp-dev-kits ``` * Get lvgl driver support for ESP32 ```bash git clone https://github.com/lvgl/lvgl_esp32_drivers ``` ...; pomin DigiKey Technology Zone

Application skills/80C196 single-chip computer mouse interface program design example: Abstract : Through an in-depth analysis of the mouse's underlying communication principles and protocols, this paper discusses the application value and feasibility of the mouse in the 80C196 single-c...; rain MCU

ucosii ver2.76 source code: ucosii ver2.76 source code...; lorant Real-time operating system RTOS

35 classic analog circuit simulations: 35 classic analog circuit simulations. Hardware engineers must learn. [url]https://download.eeworld.com.cn/detail/%E5%B0%8F%E5%B0%8F%E8%99%BE/551875[/url]...; 快羊加鞭 Download Centre

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components