74ACT299DCQR datasheet, PDF - EEWORLD Datasheet

74ACT299DCQR: DescriptionParallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, CDIP20, CERAMIC, DIP-20; Categorylogic Shift register; File Size174KB，7 Pages; ManufacturerFairchild; Websitehttp://www.fairchildsemi.com/

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74ACT299DCQR Overview

Parallel In Parallel Out, ACT Series, 8-Bit, Bidirectional, True Output, CMOS, CDIP20, CERAMIC, DIP-20

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Fairchild
Parts packaging code	DIP
package instruction	DIP, DIP20,.3
Contacts	20
Reach Compliance Code	unknown
Other features	HOLD MODE; COMMON I/O PINS; GATED OUTPUT CONTROL
Counting direction	BIDIRECTIONAL
series	ACT
JESD-30 code	R-GDIP-T20
JESD-609 code	e0
Logic integrated circuit type	PARALLEL IN PARALLEL OUT
Number of digits	8
Number of functions	1
Number of terminals	20
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	CERAMIC, GLASS-SEALED
encapsulated code	DIP
Encapsulate equivalent code	DIP20,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Certification status	Not Qualified
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.5 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Trigger type	POSITIVE EDGE
width	7.62 mm
minfmax	125 MHz
Base Number Matches	1

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