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74LVXC3245DWR2

Description
LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SOIC-24
Categorylogic   
File Size219KB,16 Pages
ManufacturerON Semiconductor
Websitehttp://www.onsemi.cn
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74LVXC3245DWR2 Overview

LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SOIC-24

74LVXC3245DWR2 Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerON Semiconductor
Parts packaging codeSOIC
package instructionPLASTIC, SOIC-24
Contacts24
Reach Compliance Codecompliant
Other featuresALSO REQUIRES A 5V SUPPLY
seriesLV/LV-A/LVX/H
JESD-30 codeR-PDSO-G24
JESD-609 codee0
length15.4 mm
Logic integrated circuit typeBUS TRANSCEIVER
Number of digits8
Number of functions1
Number of ports2
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output characteristics3-STATE
Output polarityTRUE
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)225
propagation delay (tpd)9 ns
Certification statusNot Qualified
Maximum seat height2.65 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)2.7 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5 mm
Base Number Matches1
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Advance Information
Configurable Dual Supply
Octal Transceiver
MC74LVXC3245
with 3-State Outputs for 3V Systems
The 74LVXC3245 is a 24–pin dual–supply, octal configurable voltage
interface transceiver especially well suited for PCMCIA and other real
time configurable I/O applications. The VCCA pin accepts a 3V supply
level; the A port is a dedicated 3V port. The VCCB pin accepts a 3V–to–5V
supply level. The B port is configured to track the VCCB supply level. A 5V
level on the VCCB pin will configure the I/O pins at a 5V level and a 3V
VCCB will configure the I/O pins at a 3V level. The A port interfaces with a
3V host system and the B port to the card slots. This device will allow the
VCCB voltage source pin and I/O pins on the B port to float when OE is
High. This feature is necessary to buffer data to and from a PCMCIA
socket that permits PCMCIA cards to be inserted and removed during
normal operation. The Transmit/Receive (T/R) input determines the
direction of data flow. Transmit (active–High) enables data from the A port
to B port. Receive (active–Low) enables data from the B port to the A port.
LOW–VOLTAGE CMOS
LVX
DW SUFFIX
24–LEAD PLASTIC WIDE SOIC PACKAGE
CASE 751E–04
Bidirectional Interface Between 3V and 3V/5V Buses
Control Inputs Compatible with TTL Level
Outputs Source/Sink Up to 24mA
Guaranteed Simultaneous Switching Noise Level and Dynamic
Threshold Performance
Available in SOIC and TSSOP Packages
Flexible VCCB Operating Range
Allows B Port and VCCB to Float Simultaneously When OE Is High
Functionally Compatible with the 74 Series 245
VCCB NC
24
23
OE
22
B0
21
B1
20
B2
19
B3
18
B4
17
B5
16
B6
15
B7
14
GND
13
DT SUFFIX
24–LEAD PLASTIC TSSOP PACKAGE
CASE 948H–01
PIN NAMES
Pins
OE
T/R
A0–A7
B0–B7
Function
Output Enable Input
Transmit/Receive Input
Side A 3–State Inputs or 3–State
Outputs
Side B 3–State Inputs or 3–State
Outputs
1
2
3
A0
4
A1
5
A2
6
A3
7
A4
8
A5
9
A6
10
A7
11
12
VCCA T/R
GND GND
Figure 1. 24–Lead Pinout
(Top View)
This document contains information on a new product. Specifications and information herein are subject to
change without notice.
7/97
©
Motorola, Inc. 1997
70
REV 1

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74LVXC3245DWR2 74LVXC3245DW 74LVXC3245DT 74LVXC3245DTR2
Description LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SOIC-24 LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, SOIC-24 LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, TSSOP-24 LV/LV-A/LVX/H SERIES, 8-BIT TRANSCEIVER, TRUE OUTPUT, PDSO24, PLASTIC, TSSOP-24
Is it Rohs certified? incompatible incompatible incompatible incompatible
Parts packaging code SOIC SOIC TSSOP TSSOP
package instruction PLASTIC, SOIC-24 SOP, TSSOP, TSSOP,
Contacts 24 24 24 24
Reach Compliance Code compliant compliant compliant compliant
Other features ALSO REQUIRES A 5V SUPPLY ALSO REQUIRES A 5V SUPPLY ALSO REQUIRES A 5V SUPPLY ALSO REQUIRES A 5V SUPPLY
series LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 code R-PDSO-G24 R-PDSO-G24 R-PDSO-G24 R-PDSO-G24
JESD-609 code e0 e0 e0 e0
length 15.4 mm 15.4 mm 7.8 mm 7.8 mm
Logic integrated circuit type BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER BUS TRANSCEIVER
Number of digits 8 8 8 8
Number of functions 1 1 1 1
Number of ports 2 2 2 2
Number of terminals 24 24 24 24
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE
Output polarity TRUE TRUE TRUE TRUE
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code SOP SOP TSSOP TSSOP
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) 225 225 240 240
propagation delay (tpd) 9 ns 9 ns 9 ns 9 ns
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
Maximum seat height 2.65 mm 2.65 mm 1.2 mm 1.2 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V 3.6 V 3.6 V
Minimum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V
Nominal supply voltage (Vsup) 3 V 3 V 3 V 3 V
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Tin/Lead (Sn/Pb) TIN LEAD TIN LEAD TIN LEAD
Terminal form GULL WING GULL WING GULL WING GULL WING
Terminal pitch 1.27 mm 1.27 mm 0.65 mm 0.65 mm
Terminal location DUAL DUAL DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 30
width 7.5 mm 7.5 mm 4.4 mm 4.4 mm
Base Number Matches 1 1 1 1
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