AM29LV6402ML110R datasheet, PDF

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AM29LV6402ML110R: Description128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control; File Size423KB，57 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/

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AM29LV6402ML110R Overview

128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control

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Am29LV6402M

Data Sheet

RETIRED

PRODUCT

This product has been retired and is not available for designs. For new and current designs,

S29GL128N supersedes Am29LV6402M and is the factory-recommended migration path. Please

refer to the S29GL128N Data Sheet for specifications and ordering information. Availability of this

document is retained for reference and historical purposes only

July 2003

The following document specifies Spansion memory products that are now offered by both Advanced

Micro Devices and Fujitsu. Although the document is marked with the name of the company that

originally developed the specification, these products will be offered to customers of both AMD and

Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal datasheet improvement and are noted in the

document revision summary, where supported. Future routine revisions will occur when appro-

priate, and changes will be noted in a revision summary.

Continuity of Ordering Part Numbers

AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order

these products, please use only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about Spansion

memory solutions.

Publication Number

27552

Revision

Amendment

Issue Date

January 23, 2006

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

MCP Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . 4

Flash Memory Block diagram . . . . . . . . . . . . . . . . 5

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6

Special Package Handling Instructions .................................... 6

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 7

Logic Symbols . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

x16 Mode .................................................................................. 7

x32 Mode .................................................................................. 7

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 9

Table 1. Device Bus Operations ....................................................... 9

Chip Erase Command Sequence ........................................... 29

Sector Erase Command Sequence ........................................ 29

Erase Suspend/Erase Resume Commands ........................... 29

Figure 7. Erase Operation .............................................................. 30

Table 10. Command Definitions (x32 Mode, WORD# = V

) ......... 31

Table 11. Command Definitions (x16 Mode, WORD# = V

).......... 32

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 33

DQ7 and DQ5: Data# Polling .................................................. 33

Figure 8. Data# Polling Algorithm .................................................. 33

DQ6 and DQ14: Toggle Bits I ................................................. 34

Figure 9. Toggle Bit Algorithm ........................................................ 35

VersatileIO

) Control ........................................................ 9

Requirements for Reading Array Data ................................... 10

Page Mode Read ............................................................................10

Writing Commands/Command Sequences ............................ 10

Write Buffer .....................................................................................10

Accelerated Program Operation ......................................................10

Autoselect Functions .......................................................................10

DQ2 and DQ10: Toggle Bits II ................................................ 35

Reading Toggle Bits DQ6 and DQ14/DQ2 and DQ10 ............ 35

DQ5 and DQ13: Exceeded Timing Limits ............................... 36

DQ3 and DQ11: Sector Erase Timer ...................................... 36

DQ1: Write-to-Buffer Abort ..................................................... 37

Table 12. Write Operation Status................................................... 37

Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 38

Figure 10. Maximum Negative Overshoot Waveform ................... 38

Figure 11. Maximum Positive Overshoot Waveform ..................... 38

Automatic Sleep Mode ........................................................... 11

RESET#: Hardware Reset Pin ............................................... 11

Output Disable Mode .............................................................. 11

Table 2. Sector Address Table........................................................ 12

Table 3. Autoselect Codes, (High Voltage Method) ....................... 15

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 38

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39

Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Figure 12. Test Setup ..................................................................... 40

Table 13. Test Specifications ......................................................... 40

Sector Group Protection and Unprotection ............................. 16

Table 4. Sector Group Protection/Unprotection Address Table ..... 16

Key to Switching Waveforms. . . . . . . . . . . . . . . . 40

Figure 13. Input Waveforms and

Measurement Levels ...................................................................... 40

Temporary Sector Group Unprotect ....................................... 17

Figure 1. Temporary Sector Group Unprotect Operation ................17

Figure 2. In-System Sector Group Protect/Unprotect Algorithms ...18

SecSi (Secured Silicon) Sector Flash Memory Region .......... 19

Table 5. SecSi Sector Contents ...................................................... 19

Figure 3. SecSi Sector Protect Verify ..............................................20

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 41

Read-Only Operations ........................................................... 41

Figure 14. Read Operation Timings ............................................... 41

Figure 15. Page Read Timings ...................................................... 42

Hardware Data Protection ...................................................... 20

Low VCC Write Inhibit .....................................................................20

Write Pulse “Glitch” Protection ........................................................20

Logical Inhibit ..................................................................................20

Power-Up Write Inhibit ....................................................................20

Hardware Reset (RESET#) .................................................... 43

Figure 16. Reset Timings ............................................................... 43

Erase and Program Operations .............................................. 44

Figure 17. Program Operation Timings .......................................... 45

Figure 18. Accelerated Program Timing Diagram .......................... 45

Figure 19. Chip/Sector Erase Operation Timings .......................... 46

Figure 20. Data# Polling Timings (During Embedded Algorithms) . 47

Figure 21. Toggle Bit Timings (During Embedded Algorithms) ...... 48

Figure 22. DQ2 vs. DQ6 ................................................................. 48

Common Flash Memory Interface (CFI) . . . . . . . 20

Table 6. CFI Query Identification String ..........................................21

Table 7. System Interface String..................................................... 21

Table 8. Device Geometry Definition ..............................................22

Table 9. Primary Vendor-Specific Extended Query ........................23

Temporary Sector Unprotect .................................................. 49

Figure 23. Temporary Sector Group Unprotect Timing Diagram ... 49

Figure 24. Sector Group Protect and Unprotect Timing Diagram .. 50

Command Definitions . . . . . . . . . . . . . . . . . . . . . 24

Reading Array Data ................................................................ 24

Reset Command ..................................................................... 24

Autoselect Command Sequence ............................................ 24

Enter SecSi Sector/Exit SecSi Sector Command Sequence .. 25

Doubleword/Word Program Command Sequence ................. 25

Unlock Bypass Command Sequence ..............................................25

Write Buffer Programming ...............................................................25

Accelerated Program ......................................................................26

Figure 4. Write Buffer Programming Operation ...............................27

Figure 5. Program Operation ..........................................................28

Alternate CE# Controlled Erase and Program Operations ..... 51

Figure 25. Alternate CE# Controlled Write (Erase/Program)

Operation Timings .......................................................................... 52

Program Suspend/Program Resume Command Sequence ... 28

Figure 6. Program Suspend/Program Resume ...............................28

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 52

Erase And Programming Performance. . . . . . . . 53

TSOP Pin and BGA Package Capacitance . . . . . 53

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 53

LSB080—80-Ball Fortified Ball Grid Array (Fortified BGA)

13 x 11 mm Package .............................................................. 54

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55

January 23, 2006

Am29LV6402M

AM29LV6402ML110R Related Products

	AM29LV6402ML110R	AM29LV6402M	AM29LV6402MH100R	AM29LV6402MH110R	AM29LV6402ML100R	AM29LV6402MH110RPHI	AM29LV6402ML110RPHI	AM29LV6402ML100RPHI	AM29LV6402MH100RPHI
Description	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control	128 Megabit (4 M x 32-Bit/8 M x 16-Bit) MirrorBit 3.0 Volt-only Uniform Sector Flash Memory with Versatile I/O Control

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