SUPPLEMENT
Am29LV200B Known Good Die
2 Megabit (256 K x 8-Bit/128 K x 16-Bit)
CMOS 3.0 Volt-only, Boot Sector Flash Memory, Die Revison 1
DISTINCTIVE CHARACTERISTICS
■
Single power supply operation
— 2.7 to 3.6 volt read and write operations for
battery-powered applications
■
Manufactured on 0.32 µm process technology
■
High performance
—
60R, 70, 90, 120
ns access time
■
Low power consumption (typical values at
5 MHz)
— 200 nA Automatic Sleep mode current
— 200 nA standby mode current
— 7 mA read current
— 15 mA program/erase current
■
Flexible sector architecture
— One 16 Kbyte, two 8 Kbyte, one 32 Kbyte, and
seven 64 Kbyte sectors (byte mode)
— One 8 Kword, two 4 Kword, one 16 Kword, and
seven 32 Kword sectors (word mode)
— Supports full chip erase
— Sector Protection features:
A hardware method of locking a sector to prevent
any program or erase operations within that
sector
Sectors can be locked in-system or via
programming equipment
Temporary Sector Unprotect feature allows code
changes in previously locked sectors
■
Unlock Bypass Program Command
— Reduces overall programming time when issuing
multiple program command sequences
■
Top or Bottom boot block configuration
■
Embedded Algorithms
— Embedded Erase algorithm automatically
preprograms and erases the entire chip or any
combination of designated sectors
— Embedded Program algorithm automatically
writes and verifies data at specified addresses
■
Minimum 1,000,000 write cycle guarantee
per sector
■
Compatibility with JEDEC standards
— Pinout and software compatible with single-
power supply Flash
— Superior inadvertent write protection
■
Data# Polling and toggle bits
— Provides a software method of detecting program
or erase operation completion
■
Ready/Busy# pin (RY/BY#)
— Provides a hardware method of detecting
program or erase cycle completion
■
Erase Suspend/Erase Resume
— Suspends an erase operation to read data from,
or program data to, a sector that is not being
erased, then resumes the erase operation
■
Hardware reset pin (RESET#)
— Hardware method to reset the device to reading
array data
■
20-year data retention at 125
°
C
■
Tested to datasheet specifications at
temperature
■
Quality and reliability levels equivalent to
standard packaged components
■
500 µm or 280 µm die thickness shipping options
Publication#
26014
Rev:
A
Amendment/+2
Issue Date:
November 18, 2003
S U P P L E M E N T
GENERAL DESCRIPTION
The Am29LV200B in Known Good Die (KGD) form is a
2 Mbit, 3.0 volt-only Flash memory. AMD defines KGD
as standard product in die form, tested for functionality
and speed. AMD KGD products have the same reliability
and quality as AMD products in packaged form.
The host system can detect whether a program or
erase operation is complete by observing the RY/BY#
pin, or by reading the DQ7 (Data# Polling) and DQ6
(toggle)
status bits.
After a program or erase cycle
has been completed, the device is ready to read array
data or accept another command.
The
sector erase architecture
allows memory sectors
to be erased and reprogrammed without affecting the
data contents of other sectors. The device is fully
erased when shipped from the factory.
Hardware data protection
measures include a low
V
CC
detector that automatically inhibits write opera-
tions during power transitions. The
hardware sector
protection
feature disables both program and erase
operations in any combination of the sectors of
memory. This can be achieved in-system or via pro-
gramming equipment.
The
Erase Suspend
feature enables the user to put
erase on hold for any period of time to read data from,
or program data to, any sector that is not selected for
erasure. True background erase can thus be achieved.
The
hardware RESET# pin
terminates any operation
in progress and resets the internal state machine to
reading array data. The RESET# pin may be tied to the
system reset circuitry. A system reset would thus also
reset the device, enabling the system microprocessor
to read the boot-up firmware from the Flash memory.
The device offers two power-saving features. When
addresses have been stable for a specified amount of
time, the device enters the
automatic sleep mode.
The system can also place the device into the
standby
mode.
Power consumption is greatly reduced in both
these modes.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The device electrically erases all bits within
a sector simultaneously via Fowler-Nordheim tun-
neling. The data is programmed using hot electron injec-
tion.
Am29LV200B Features
The Am29LV200B is an 2 Mbit, 3 volt-only Flash
memory organized as 262,144 bytes or 131,072 words.
The word-wide data (x16) appears on DQ15–DQ0; the
byte-wide (x8) data appears on DQ7–DQ0. To elimi-
nate bus contention the device has separate chip
enable (CE#), write enable (WE#) and output enable
(OE#) controls.
The device requires only a
single 3 volt power supply
for both read and write functions. Internally generated
and regulated voltages are provided for the program
and erase operations. No V
PP
is required for program
or erase operations. The device can also be pro-
grammed in standard EPROM programmers.
The device is entirely command set compatible with the
JEDEC single-power-supply Flash standard.
Com-
mands are written to the command register using stan-
dard microprocessor write timings. Register contents
serve as input to an internal state-machine that con-
trols the erase and programming circuitry. Write cycles
also internally latch addresses and data needed for the
programming and erase operations. Reading data out
of the device is similar to reading from other Flash or
EPROM devices.
Device programming occurs by executing the program
command sequence. This initiates the
Embedded
Program
algorithm—an internal algorithm that auto-
matically times the program pulse widths and verifies
proper cell margin. The
Unlock Bypass
mode facili-
tates faster programming times by requiring only two
write cycles to program data instead of four.
Device erasure occurs by executing the erase
command sequence. This initiates the
Embedded
Erase
algorithm—an internal algorithm that automati-
cally preprograms the array (if it is not already pro-
grammed) before executing the erase operation.
During erase, the device automatically times the erase
pulse widths and verifies proper cell margin.
Electrical Specifications
Refer to the Am29LV200B data sheet, for full electrical
specifications on the Am29LV200B in KGD form.
2
Am29LV200B Known Good Die
November 18, 2003
PCB Design
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