AM29LV017D-70FD datasheet, PDF

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AM29LV017D-70FD: Description2M X 8 FLASH 3V PROM, 120 ns, PDSO40; Categorystorage; File Size639KB，48 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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AM29LV017D-70FD Overview

2M X 8 FLASH 3V PROM, 120 ns, PDSO40

AM29LV017D-70FD Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	40
Maximum operating temperature	85 Cel
Minimum operating temperature	-40 Cel
Maximum supply/operating voltage	3.6 V
Minimum supply/operating voltage	2.7 V
Rated supply voltage	3 V
maximum access time	120 ns
Processing package description	MO-142CD, TSOP-40
state	TRANSFERRED
Craftsmanship	CMOS
packaging shape	Rectangle
Package Size	SMALL OUTLINE, THIN PROFILE
surface mount	Yes
Terminal form	GULL WING
Terminal spacing	0.5000 mm
Terminal location	pair
Packaging Materials	Plastic/Epoxy
Temperature level	INDUSTRIAL
memory width	8
organize	2M × 8
storage density	1.68E7 deg
operating mode	ASYNCHRONOUS
Number of digits	2.10E6 words
Number of digits	2M
Memory IC type	FLASH 3V programmable read-only memory
serial parallel	parallel

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Am29LV017D

Data Sheet

RETIRED

PRODUCT

This product has been retired and is not recommended for designs. For new and current designs,

S29AL016D supersedes Am29LV017D and is the factory-recommended migration path. Please refer

to the S29AL016D datasheet for specifications and ordering information. Availability of this docu-

ment is retained for reference and historical purposes only.

April 2005

The following document specifies Spansion memory products that are now offered by both Advanced

Micro Devices and Fujitsu. Although the document is marked with the name of the company that

originally developed the specification, these products will be offered to customers of both AMD and

Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal datasheet improvement and are noted in the

document revision summary, where supported. Future routine revisions will occur when appro-

priate, and changes will be noted in a revision summary.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about Spansion

memory solutions.

Publication Number

21415

Revision

Amendment

Issue Date

June 13, 2005

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7

Special Handling Instructions for FBGA Packages .................. 8

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10

Table 1. Am29LV017D Device Bus Operations .............................. 10

Reading Toggle Bits DQ6/DQ2 ............................................... 24

Figure 6. Toggle Bit Algorithm........................................................ 25

DQ5: Exceeded Timing Limits ................................................ 26

DQ3: Sector Erase Timer ....................................................... 26

Table 9. Write Operation Status..................................................... 26

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 27

Figure 7. Maximum Negative Overshoot Waveform ...................... 27

Figure 8. Maximum Positive Overshoot Waveform........................ 27

Requirements for Reading Array Data ................................... 10

Writing Commands/Command Sequences ............................ 10

Program and Erase Operation Status .................................... 11

Standby Mode ........................................................................ 11

Automatic Sleep Mode ........................................................... 11

RESET#: Hardware Reset Pin ............................................... 11

Output Disable Mode .............................................................. 11

Table 2. Am29LV017D Sector Address Table ................................ 12

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 27

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 28

Figure 9. I

CC1

Current vs. Time (Showing Active

and Automatic Sleep Currents) ...................................................... 29

Figure 10. Typical I

CC1

vs. Frequency ........................................... 29

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Figure 11. Test Setup..................................................................... 30

Table 10. Test Specifications ......................................................... 30

Figure 12. Input Waveforms and Measurement Levels ................. 30

Autoselect Mode ..................................................................... 13

Table 3. Am29LV017D Autoselect Codes (High Voltage Method).. 13

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 31

Read Operations .................................................................... 31

Figure 13. Read Operations Timings ............................................. 31

Sector Protection/Unprotection ............................................... 13

Temporary Sector Unprotect .................................................. 13

Figure 1. In-System Sector Protect/Unprotect Algorithms .............. 14

Figure 2. Temporary Sector Unprotect Operation........................... 15

Hardware Reset (RESET#) .................................................... 32

Figure 14. RESET# Timings .......................................................... 32

Erase/Program Operations ..................................................... 33

Figure 15. Program Operation Timings..........................................

Figure 16. Chip/Sector Erase Operation Timings ..........................

Figure 17. Data# Polling Timings (During Embedded Algorithms).

Figure 18. Toggle Bit Timings (During Embedded Algorithms)......

Figure 19. DQ2 vs. DQ6.................................................................

Figure 20. Temporary Sector Unprotect Timing Diagram ..............

Figure 21. Sector Protect/Unprotect Timing Diagram ....................

Figure 22. Alternate CE# Controlled Write Operation Timings ......

Hardware Data Protection ...................................................... 15

Low V

Write Inhibit .............................................................. 15

Write Pulse “Glitch” Protection ............................................... 15

Logical Inhibit .......................................................................... 15

Power-Up Write Inhibit ............................................................ 15

Common Flash Memory Interface (CFI) . . . . . . . 16

Table 4. CFI Query Identification String .......................................... 16

Table 5. System Interface String..................................................... 16

Table 6. Device Geometry Definition .............................................. 17

Table 7. Primary Vendor-Specific Extended Query ........................ 17

Command Definitions . . . . . . . . . . . . . . . . . . . . . . 18

Reading Array Data ................................................................ 18

Reset Command ..................................................................... 18

Autoselect Command Sequence ............................................ 18

Byte Program Command Sequence ....................................... 18

Unlock Bypass Command Sequence ..................................... 19

Figure 3. Program Operation .......................................................... 19

Chip Erase Command Sequence ........................................... 19

Sector Erase Command Sequence ........................................ 20

Erase Suspend/Erase Resume Commands ........................... 20

Figure 4. Erase Operation............................................................... 21

Command Definitions ............................................................. 22

Table 8. Am29LV017D Command Definitions ............................... 22

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 23

DQ7: Data# Polling ................................................................. 23

Figure 5. Data# Polling Algorithm ................................................... 23

RY/BY#: Ready/Busy# ........................................................... 24

DQ6: Toggle Bit I .................................................................... 24

DQ2: Toggle Bit II ................................................................... 24

Latchup Characteristics . . . . . . . . . . . . . . . . . . . 41

TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . 41

Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 42

TS 040—40-Pin Standard TSOP ............................................ 42

TSR040—40-Pin Reverse TSOP ........................................... 43

FBC048—48-Ball Fine-Pitch Ball Grid Array (FBGA)

8 x 9 mm package .................................................................. 44

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 45

Revision A (October 1997) ..................................................... 45

Revision B (October 1997) ..................................................... 45

Revision C (January 1998) ..................................................... 45

Revision C+1 (February 1998) ............................................... 45

Revision C+2 (March 1998) .................................................... 45

Revision C+3 (August 1998) ................................................... 45

Revision D (January 1999) ..................................................... 45

Revision D+1 (April 12, 1999) ................................................. 45

Revision E (February 2, 2000) ................................................ 45

Revision E+1 (November 7, 2000) ......................................... 46

Revision E+2 (June 10, 2004) ................................................ 46

Am29LV017D

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