AM29LV001BB-70JC datasheet, PDF

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AM29LV001BB-70JC: Description1 Megabit (128 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory; Categorystorage storage; File Size483KB，43 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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AM29LV001BB-70JC Overview

1 Megabit (128 K x 8-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

AM29LV001BB-70JC Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Parts packaging code	LCC
package instruction	QCCJ, LDCC32,.5X.6
Contacts	32
Reach Compliance Code	unknow
ECCN code	EAR99
Maximum access time	70 ns
Other features	MINIMUM 1000K WRITE CYCLES; 20 YEAR DATA RETENTION
startup block	BOTTOM
command user interface	YES
Data polling	YES
Data retention time - minimum	20
JESD-30 code	R-PQCC-J32
JESD-609 code	e0
length	13.97 mm
memory density	1048576 bi
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of departments/size	1,2,7
Number of terminals	32
word count	131072 words
character code	128000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	70 °C
Minimum operating temperature
organize	128KX8
Package body material	PLASTIC/EPOXY
encapsulated code	QCCJ
Encapsulate equivalent code	LDCC32,.5X.6
Package shape	RECTANGULAR
Package form	CHIP CARRIER
Parallel/Serial	PARALLEL
power supply	3/3.3 V
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	3.556 mm
Department size	8K,4K,16K
Maximum standby current	0.000005 A
Maximum slew rate	0.03 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	J BEND
Terminal pitch	1.27 mm
Terminal location	QUAD
switch bit	YES
type	NOR TYPE
width	11.43 mm
Base Number Matches	1

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Am29LV001B

Data Sheet

RETIRED

PRODUCT

This product has been retired and is not recommended for designs. Please contact your Spansion

representative for alternates. Availability of this document is retained for reference and historical

purposes only.

The following document contains information on Spansion memory products.

Continuity of Specifications

There is no change to this data sheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal data sheet improvement and are noted in the

document revision summary.

For More Information

Please contact your local sales office for additional information about Spansion memory solutions.

Publication Number

21553

Revision

Amendment

Issue Date

May 5, 2006

DATA SHEET

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5

Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 6

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 7

Table 1. Am29LV001B Device Bus Operations ................................ 7

DQ6: Toggle Bit I .................................................................... 18

DQ2: Toggle Bit II ................................................................... 19

Reading Toggle Bits DQ6/DQ2 ............................................... 19

DQ5: Exceeded Timing Limits ................................................ 19

Figure 6. Toggle Bit Algorithm ........................................................ 20

DQ3: Sector Erase Timer ....................................................... 20

Table 6. Write Operation Status..................................................... 21

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 22

Figure 7. Maximum Negative Overshoot Waveform ...................... 22

Figure 8. Maximum Positive Overshoot Waveform ........................ 22

Requirements for Reading Array Data ..................................... 7

Writing Commands/Command Sequences .............................. 7

Program and Erase Operation Status ...................................... 8

Standby Mode .......................................................................... 8

Automatic Sleep Mode ............................................................. 8

RESET#: Hardware Reset Pin ................................................. 8

Output Disable Mode ................................................................ 8

Table 2. Am29LV001B Top Boot Sector Architecture ...................... 9

Table 3. Am29LV001B Bottom Boot Sector Architecture.................. 9

Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . 22

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 23

Figure 9. I

CC1

Current vs. Time (Showing Active and Automatic

Sleep Currents) .............................................................................. 24

Figure 10. Typical I

CC1

vs. Frequency ........................................... 24

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Figure 11. Test Setup ..................................................................... 25

Table 7. Test Specifications ........................................................... 25

Autoselect Mode ....................................................................... 9

Table 4. Am29LV001B Autoselect Codes....................................... 10

Key to Switching Waveforms. . . . . . . . . . . . . . . . 25

Figure 12. Input Waveforms and Measurement Levels ................. 25

Sector Protection/Unprotection ............................................... 10

Temporary Sector Unprotect .................................................. 10

Figure 1. In-System Sector Protect/Unprotect Algorithms ...............11

Figure 2. Temporary Sector Unprotect Operation ...........................12

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26

Figure 13. Read Operations Timings ............................................. 26

Hardware Reset (RESET#) .................................................... 27

Figure 14. RESET# Timings .......................................................... 27

Hardware Data Protection ...................................................... 12

Low V

Write Inhibit .............................................................. 12

Write Pulse “Glitch” Protection ............................................... 12

Logical Inhibit .......................................................................... 12

Power-Up Write Inhibit ............................................................ 12

Command Definitions . . . . . . . . . . . . . . . . . . . . . . 13

Reading Array Data ................................................................ 13

Reset Command ..................................................................... 13

Autoselect Command Sequence ............................................ 13

Byte Program Command Sequence ....................................... 13

Unlock Bypass Command Sequence ..................................... 14

Figure 3. Program Operation ..........................................................14

Erase/Program Operations ..................................................... 28

Figure 15. Program Operation Timings .......................................... 29

Figure 16. Chip/Sector Erase Operation Timings .......................... 30

Figure 17. Data# Polling Timings (During Embedded Algorithms) . 31

Figure 18. Toggle Bit Timings (During Embedded Algorithms) ...... 31

Figure 19. DQ2 vs. DQ6 ................................................................. 32

Temporary Sector Unprotect .................................................. 32

Figure 20. Temporary Sector Unprotect Timing Diagram .............. 32

Figure 21. In-System Sector Protect/Unprotect Timing Diagram ... 33

Alternate CE# Controlled Erase/Program Operations ............ 34

Figure 22. Alternate CE# Controlled Write Operation Timings ...... 35

Chip Erase Command Sequence ........................................... 14

Sector Erase Command Sequence ........................................ 15

Erase Suspend/Erase Resume Commands ........................... 15

Figure 4. Erase Operation ...............................................................16

Command Definitions ............................................................. 17

Table 5. Am29LV001B Command Definitions ................................ 17

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 18

DQ7: Data# Polling ................................................................. 18

Figure 5. Data# Polling Algorithm ...................................................18

Erase and Programming Performance . . . . . . . 36

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 36

TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 36

PLCC Pin Capacitance . . . . . . . . . . . . . . . . . . . . . 36

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 38

PL 032—32-Pin Plastic Leaded Chip Carrier ......................... 38

TS 032—32-Pin Standard Thin Small Outline Package ......... 39

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 40

May 5, 2006 21557F4

Am29LV001B

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