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HD74LV2G74AFP-30D

Description
LV/LV-A/LVX/H SERIES, D FLIP-FLOP, PDSO8, SSOP-8
Categorylogic   
File Size57KB,12 Pages
ManufacturerRenesas Electronics Corporation
Websitehttps://www.renesas.com/
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HD74LV2G74AFP-30D Overview

LV/LV-A/LVX/H SERIES, D FLIP-FLOP, PDSO8, SSOP-8

HD74LV2G74AFP-30D Parametric

Parameter NameAttribute value
MakerRenesas Electronics Corporation
Parts packaging codeSOIC
package instructionVSSOP,
Contacts8
Reach Compliance Codecompliant
Is SamacsysN
seriesLV/LV-A/LVX/H
JESD-30 codeR-PDSO-G8
length2.3 mm
Logic integrated circuit typeD FLIP-FLOP
Number of digits1
Number of functions1
Number of terminals8
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Output polarityCOMPLEMENTARY
Package body materialPLASTIC/EPOXY
encapsulated codeVSSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
propagation delay (tpd)42.5 ns
Certification statusNot Qualified
Maximum seat height0.9 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)1.8 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch0.5 mm
Terminal locationDUAL
Trigger typePOSITIVE EDGE
width2 mm
minfmax110 MHz
Base Number Matches1
HD74LV2G74A
Single D–type Flip Flops with Preset and Clear
ADE-205-346B (Z)
3rd. Edition
April 2001
Description
The HD74LV2G74A has independent data, preset, clear, and clock inputs Q and
Q
outputs in a 8 pin
package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low voltage
and high speed operation is suitable for the battery powered products (e.g., notebook computers), and the
low power consumption extends the battery life.
Features
The basic gate function is lined up as hitachi uni logic series.
Supplied on emboss taping for high speed automatic mounting.
Electrical characteristics equivalent to the HD74LV74A
Supply voltage range : 1.65 to 5.5 V
Operating temperature range : –40 to +85°C
All inputs V
IH
(Max.) = 5.5 V (@V
CC
= 0 V to 5.5 V)
All outputs V
O
(Max.) = 5.5 V (@V
CC
= 0 V)
Output current
±6
mA (@V
CC
= 3.0 V to 3.6 V),
±12
mA (@V
CC
= 4.5 V to 5.5 V)
All the logical input has hysteresis voltage for the slow transition.

HD74LV2G74AFP-30D Related Products

HD74LV2G74AFP-30D
Description LV/LV-A/LVX/H SERIES, D FLIP-FLOP, PDSO8, SSOP-8
Maker Renesas Electronics Corporation
Parts packaging code SOIC
package instruction VSSOP,
Contacts 8
Reach Compliance Code compliant
Is Samacsys N
series LV/LV-A/LVX/H
JESD-30 code R-PDSO-G8
length 2.3 mm
Logic integrated circuit type D FLIP-FLOP
Number of digits 1
Number of functions 1
Number of terminals 8
Maximum operating temperature 85 °C
Minimum operating temperature -40 °C
Output polarity COMPLEMENTARY
Package body material PLASTIC/EPOXY
encapsulated code VSSOP
Package shape RECTANGULAR
Package form SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH
propagation delay (tpd) 42.5 ns
Certification status Not Qualified
Maximum seat height 0.9 mm
Maximum supply voltage (Vsup) 5.5 V
Minimum supply voltage (Vsup) 1.65 V
Nominal supply voltage (Vsup) 1.8 V
surface mount YES
technology CMOS
Temperature level INDUSTRIAL
Terminal form GULL WING
Terminal pitch 0.5 mm
Terminal location DUAL
Trigger type POSITIVE EDGE
width 2 mm
minfmax 110 MHz
Base Number Matches 1

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