PHU11NQ10T
TrenchMOS™ standard level FET
Rev. 01 — 28 May 2002
M3D445
Product data
1. Description
N-channel enhancement mode field-effect transistor in a plastic package using
TrenchMOS™ technology.
Product availability:
PHU11NQ10T in SOT533 (I-pak).
2. Features
s
TrenchMOS™ technology
s
Fast switching
s
Low on-state resistance.
3. Applications
s
Relay driver
s
High speed line driver
s
General purpose switch.
4. Pinning information
Table 1:
Pin
1
2
3
tab
Pinning - SOT533, simplified outline and symbol
Description
gate (g)
d
Simplified outline
Symbol
drain (d)
source (s)
drain (d)
g
s
MBB076
1
Top view
2
3
MBK915
SOT533
Philips Semiconductors
PHU11NQ10T
TrenchMOS™ standard level FET
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
25
°C ≤
T
j
≤
175
°C
T
mb
= 25
°C;
V
GS
= 10 V
T
mb
= 25
°C
V
GS
= 10 V; I
D
= 9 A; T
j
= 25
°C
Typ
-
-
-
-
150
Max
100
10.9
57.7
175
180
Unit
V
A
W
°C
mΩ
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
I
D
I
DM
P
tot
T
stg
T
j
I
S
I
SM
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
drain current (DC)
peak drain current
total power dissipation
storage temperature
junction temperature
source (diode forward) current (DC) T
mb
= 25
°C
peak source (diode forward) current T
mb
= 25
°C;
t
p
≤
10
µs
unclamped inductive load; I
D
= 3.2 A;
t
p
= 0.2 ms; V
DD
≤
15 V; R
GS
= 50
Ω;
V
GS
= 10 V; starting T
j
= 25
°C
T
mb
= 25
°C;
V
GS
= 10 V;
Figure 2
and
3
T
mb
= 100
°C;
V
GS
= 10 V;
Figure 2
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
Conditions
25
°C ≤
T
j
≤
175
°C
25
°C ≤
T
j
≤
175
°C;
R
GS
= 20 kΩ
Min
-
-
-
-
-
-
-
−55
−55
-
-
-
Max
100
100
±20
10.9
7.7
43.6
57.7
+175
+175
10.9
43.6
35
Unit
V
V
V
A
A
A
W
°C
°C
A
A
mJ
Source-drain diode
Avalanche ruggedness
E
DS(AL)S
non-repetitive drain-source
avalanche energy
9397 750 09528
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 28 May 2002
2 of 12
Philips Semiconductors
PHU11NQ10T
TrenchMOS™ standard level FET
120
Pder
(%)
80
03aa16
120
Ider
(%)
80
03aa24
40
40
0
0
50
100
150
200
Tmb (°C)
0
0
50
100
150
200
Tmb (°C)
P
tot
P
der
=
----------------------
×
100%
P
°
tot
(
25 C
)
I
D
I
der
=
------------------
×
100%
-
I
°
D
(
25 C
)
Fig 1. Normalized total power dissipation as a
function of mounting base temperature.
Fig 2. Normalized continuous drain current as a
function of mounting base temperature.
102
ID
(A)
Limit RDSon = VDS / ID
tp = 10
µs
03ai94
10
100 µs
DC
1
1 ms
10-1
1
10
102
VDS (V)
103
T
mb
= 25
°C;
I
DM
is single pulse; V
GS
= 10V.
Fig 3. Safe operating area; continuous and peak drain currents as a function of drain-source voltage.
9397 750 09528
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 28 May 2002
3 of 12
Philips Semiconductors
PHU11NQ10T
TrenchMOS™ standard level FET
7. Thermal characteristics
Table 4:
R
th(j-mb)
R
th(j-a)
Thermal characteristics
Conditions
SOT533 package; vertical in still air
Min Typ Max Unit
-
-
-
70
2.6
-
K/W
K/W
thermal resistance from junction to mounting base
Figure 4
thermal resistance from junction to ambient
Symbol Parameter
7.1 Transient thermal impedance
10
Zth(j-mb)
(K/W)
δ
= 0.5
1
0.2
0.1
0.05
10-1
0.02
P
single pulse
03ai93
δ
=
tp
T
tp
T
10-2
10-5
10-4
10-3
10-2
tp (s)
t
10-1
Fig 4. Transient thermal impedance from junction to mounting base as a function of pulse duration.
9397 750 09528
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 28 May 2002
4 of 12
Philips Semiconductors
PHU11NQ10T
TrenchMOS™ standard level FET
8. Characteristics
Table 5: Characteristics
T
j
= 25
°
C unless otherwise specified
Symbol Parameter
Static characteristics
V
(BR)DSS
drain-source breakdown voltage
V
GS
= 0 V; I
D
= 250
µA
T
j
= 25
°C
T
j
=
−55 °C
V
GS(th)
gate-source threshold voltage
V
DS
= V
GS
; I
D
= 1 mA;
Figure 9
T
j
= 25
°C
T
j
= 175
°C
T
j
=
−55 °C
I
DSS
drain-source leakage current
V
DS
= 100 V; V
GS
= 0 V
T
j
= 25
°C
T
j
= 175
°C
I
GSS
R
DSon
gate-source leakage current
drain-source on-state resistance
V
DS
= 0 V; V
GS
=
±10
V
V
GS
= 10 V; I
D
= 9 A;
Figure 7
and
8
T
j
= 25
°C
T
j
= 175
°C
Dynamic characteristics
Q
g(tot)
Q
gs
Q
gd
C
iss
C
oss
C
rss
t
d(on)
t
r
t
d(off)
t
f
V
SD
t
rr
Q
r
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
source-drain (diode forward) voltage I
S
= 11 A; V
GS
= 0 V;
Figure 12
reverse recovery time
recovered charge
I
S
= 4 A; dI
S
/dt =
−100
A/µs; V
GS
= 0 V
V
DD
= 50 V; R
D
= 4.7
Ω;
V
GS
= 10 V; R
G
= 5.6
Ω
V
GS
= 0 V; V
DS
= 25 V; f = 1 MHz;
Figure 11
I
D
= 11 A; V
DS
= 80 V; V
GS
= 10 V;
Figure 13
-
-
-
-
-
-
-
-
-
-
-
-
-
14.7
2.3
5.3
360
60
40
5.5
23
11.5
7.2
1
55
85
-
-
-
-
-
-
-
-
-
-
1.5
-
-
nC
nC
nC
pF
pF
pF
ns
ns
ns
ns
V
ns
nC
-
-
150
-
180
485
mΩ
mΩ
-
-
-
0.05
10
10
10
500
100
µA
µA
nA
1
0.6
-
3
-
-
4
-
4.6
V
V
V
100
89
130
-
-
-
V
V
Conditions
Min
Typ
Max
Unit
Source-drain diode
9397 750 09528
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
Product data
Rev. 01 — 28 May 2002
5 of 12
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