AM29DL640G35PCIN datasheet, PDF

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AM29DL640G35PCIN: Description4M X 16 FLASH 3V PROM, 70 ns, PDSO48; Categorystorage; File Size733KB，56 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/

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AM29DL640G35PCIN Overview

4M X 16 FLASH 3V PROM, 70 ns, PDSO48

AM29DL640G35PCIN Parametric

Parameter Name	Attribute value
Number of functions	1
Number of terminals	48
Minimum operating temperature	-40 Cel
Maximum operating temperature	85 Cel
Rated supply voltage	3 V
Minimum supply/operating voltage	2.7 V
Maximum supply/operating voltage	3.6 V
Processing package description	MO-142DD, TSOP-48
state	Transferred
ype	NOR TYPE
sub_category	Flash Memories
ccess_time_max	70 ns
boot_block	BOTTOM/TOP
command_user_interface	YES
common_flash_interface	YES
data_polling	YES
jesd_30_code	R-PDSO-G48
storage density	6.71E7 bi
Memory IC type	FLASH
memory width	16
Spare memory width	8
umber_of_sectors_size	16,126
Number of digits	4.19E6 words
Number of digits	4M
operating mode	ASYNCHRONOUS
organize	4MX16
Packaging Materials	PLASTIC/EPOXY
ckage_code	TSOP1
ckage_equivalence_code	TSSOP48,.8,20
packaging shape	RECTANGULAR
Package Size	SMALL OUTLINE, THIN PROFILE
serial parallel	PARALLEL
wer_supplies__v_	3/3.3
gramming_voltage__v_	3
qualification_status	COMMERCIAL
eady_busy	YES
seated_height_max	1.2 mm
sector_size__words_	8K,64K
standby_current_max	5.00E-6 Am
Maximum supply voltage	0.0450 Am
surface mount	YES
Craftsmanship	CMOS
Temperature level	INDUSTRIAL
Terminal form	GULL WING
Terminal spacing	0.5000 mm
Terminal location	DUAL
ggle_bi	YES
length	18.4 mm
width	12 mm

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Am29DL640G

Data Sheet

RETIRED

PRODUCT

This product has been retired and is not recommended for designs. For new and current designs,

S29JL064H (for TSOP packages) and S29PL064J (for FBGA packages) supersede AM29DL640G as

the factory-recommended migration path. Please refer to each respective datasheets for specifica-

tions and ordering information. Availability of this document is retained for reference and historical

purposes only.

April 2005

The following document specifies Spansion memory products that are now offered by both Advanced

Micro Devices and Fujitsu. Although the document is marked with the name of the company that

originally developed the specification, these products will be offered to customers of both AMD and

Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal datasheet improvement and are noted in the

document revision summary, where supported. Future routine revisions will occur when appro-

priate, and changes will be noted in a revision summary.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about Spansion

memory solutions.

Publication Number

25693

Revision

Amendment

Issue Date

June 6, 2005

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 5

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 6

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . 7

Special Handling Instructions for BGA Packages ..................... 7

Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9

Device Bus Operations . . . . . . . . . . . . . . . . . . . . 10

Table 1. Am29DL640G Device Bus Operations ..............................10

Erase Suspend/Erase Resume Commands ........................... 28

Table 12. Am29DL640G Command Definitions ............................. 29

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 30

DQ7: Data# Polling ................................................................. 30

Figure 6. Data# Polling Algorithm .................................................. 30

RY/BY#: Ready/Busy#............................................................ 31

DQ6: Toggle Bit I .................................................................... 31

Figure 7. Toggle Bit Algorithm........................................................ 31

Word/Byte Configuration ........................................................ 10

Requirements for Reading Array Data ................................... 10

Writing Commands/Command Sequences ............................ 11

Accelerated Program Operation ............................................. 11

Autoselect Functions .............................................................. 11

Simultaneous Read/Write Operations with Zero Latency ....... 11

Standby Mode ........................................................................ 11

Automatic Sleep Mode ........................................................... 12

RESET#: Hardware Reset Pin ............................................... 12

Output Disable Mode .............................................................. 12

Table 2. Am29DL640G Sector Architecture ....................................12

Table 3. Bank Address ....................................................................15

Table 4. SecSi

Sector Addresses ................................................15

DQ2: Toggle Bit II ................................................................... 32

Reading Toggle Bits DQ6/DQ2 ............................................... 32

DQ5: Exceeded Timing Limits ................................................ 32

DQ3: Sector Erase Timer ....................................................... 32

Table 13. Write Operation Status ................................................... 33

Absolute Maximum Ratings. . . . . . . . . . . . . . . . . 34

Figure 8. Maximum Negative Overshoot Waveform ...................... 34

Figure 9. Maximum Positive Overshoot Waveform........................ 34

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 35

Figure 10. I

CC1

Current vs. Time (Showing Active and

Automatic Sleep Currents) ............................................................. 36

Figure 11. Typical I

CC1

vs. Frequency ............................................ 36

Test Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Figure 12. Test Setup.................................................................... 37

Figure 13. Input Waveforms and Measurement Levels ................. 37

Autoselect Mode..................................................................... 15

Table 5. Am29DL640G Autoselect Codes, (High Voltage Method) 16

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 38

Read-Only Operations ........................................................... 38

Figure 14. Read Operation Timings ............................................... 38

Sector/Sector Block Protection and Unprotection .................. 17

Table 6. Am29DL640G Boot Sector/Sector Block Addresses for

Protection/Unprotection ...................................................................17

Hardware Reset (RESET#) .................................................... 39

Figure 15. Reset Timings ............................................................... 39

Write Protect (WP#) ................................................................ 17

Table 7. WP#/ACC Modes ..............................................................18

Word/Byte Configuration (BYTE#) .......................................... 40

Figure 16. BYTE# Timings for Read Operations............................ 40

Figure 17. BYTE# Timings for Write Operations............................ 40

Temporary Sector Unprotect .................................................. 18

Figure 1. Temporary Sector Unprotect Operation........................... 18

Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 19

Erase and Program Operations .............................................. 41

Figure 18. Program Operation Timings..........................................

Figure 19. Accelerated Program Timing Diagram..........................

Figure 20. Chip/Sector Erase Operation Timings ..........................

Figure 21. Back-to-back Read/Write Cycle Timings ......................

Figure 22. Data# Polling Timings (During Embedded Algorithms).

Figure 23. Toggle Bit Timings (During Embedded Algorithms)......

Figure 24. DQ2 vs. DQ6.................................................................

SecSi™ (Secured Silicon) Sector

Flash Memory Region ............................................................ 20

Figure 3. SecSi Sector Protect Verify.............................................. 21

Hardware Data Protection ...................................................... 21

Low VCC Write Inhibit ............................................................ 21

Write Pulse “Glitch” Protection ............................................... 21

Logical Inhibit .......................................................................... 21

Power-Up Write Inhibit ............................................................ 21

Common Flash Memory Interface (CFI) . . . . . . . 21

Table 8. CFI Query Identification String .......................................... 22

Table 9. System Interface String......................................................22

Table 10. Device Geometry Definition ............................................ 23

Table 11. Primary Vendor-Specific Extended Query ...................... 24

Temporary Sector Unprotect .................................................. 46

Figure 25. Temporary Sector Unprotect Timing Diagram .............. 46

Figure 26. Sector/Sector Block Protect and

Unprotect Timing Diagram ............................................................. 47

Alternate CE# Controlled Erase and Program Operations ..... 48

Figure 27. Alternate CE# Controlled Write (Erase/Program)

Operation Timings.......................................................................... 49

Command Definitions . . . . . . . . . . . . . . . . . . . . . 25

Reading Array Data ................................................................ 25

Reset Command ..................................................................... 25

Autoselect Command Sequence ............................................ 25

Enter SecSi™ Sector/Exit SecSi Sector

Command Sequence .............................................................. 25

Byte/Word Program Command Sequence ............................. 26

Unlock Bypass Command Sequence ..................................... 26

Figure 4. Program Operation .......................................................... 27

Chip Erase Command Sequence ........................................... 27

Sector Erase Command Sequence ........................................ 27

Figure 5. Erase Operation............................................................... 28

Erase And Programming Performance. . . . . . . . 50

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 50

TSOP & BGA Pin Capacitance. . . . . . . . . . . . . . . 50

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 52

FBE063—63-Ball Fine-Pitch Ball Grid Array (FBGA)

12 x 11 mm package .............................................................. 52

LAA064—64-Ball Fortified Ball Grid Array (FBGA)

13 x 11 mm package .............................................................. 53

TS 048—48-Pin Standard TSOP ............................................ 54

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 55

June 6, 2005

Am29DL640G

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