AM29DL323DT70RWDI datasheet, PDF

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AM29DL323DT70RWDI: Description32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory; Categorystorage storage; File Size639KB，56 Pages; ManufacturerAMD; Websitehttp://www.amd.com

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AM29DL323DT70RWDI Overview

32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory

AM29DL323DT70RWDI Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	AMD
Parts packaging code	BGA
package instruction	TFBGA, BGA63,8X12,32
Contacts	63
Reach Compliance Code	unknow
ECCN code	3A991.B.1.A
Is Samacsys	N
Maximum access time	70 ns
Other features	MINIMUM 1000K PROGRAM/ERASE CYCLE; 20 YEAR DATA RETENTION
Spare memory width	8
startup block	TOP
command user interface	YES
Universal Flash Interface	YES
Data polling	YES
Data retention time - minimum	20
JESD-30 code	R-PBGA-B63
JESD-609 code	e0
length	14 mm
memory density	33554432 bi
Memory IC Type	FLASH
memory width	16
Number of functions	1
Number of departments/size	8,63
Number of terminals	63
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	2MX16
Package body material	PLASTIC/EPOXY
encapsulated code	TFBGA
Encapsulate equivalent code	BGA63,8X12,32
Package shape	RECTANGULAR
Package form	GRID ARRAY, THIN PROFILE, FINE PITCH
Parallel/Serial	PARALLEL
power supply	3.3 V
Programming voltage	3 V
Certification status	Not Qualified
ready/busy	YES
Maximum seat height	1.2 mm
Department size	8K,64K
Maximum standby current	0.000005 A
Maximum slew rate	0.045 mA
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	BALL
Terminal pitch	0.8 mm
Terminal location	BOTTOM
switch bit	YES
type	NOR TYPE
width	8 mm
Base Number Matches	1

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Am29DL322D/323D/324D

Data Sheet

This product has been retired and is not available for designs. For new and current designs involving TSOP pack-

ages, S29JL032H supersedes Am29DL32xD and is the factory-recommended migration path. Please refer to the

S29JL032H Datasheet for specifications and ordering information.

For new and current designs involving Fine-pitch BGA (FBGA) packages, S29PL032J supersedes Am29DL32xD

and is the factory-recommended migration path. Please refer to the S29PL032J Datasheet for specifications and

ordering information. Availability of this document is retained for reference and historical purposes only.

July 2003

The following document specifies Spansion memory products that are now offered by both Advanced

Micro Devices and Fujitsu. Although the document is marked with the name of the company that orig-

inally developed the specification, these products will be offered to customers of both AMD and

Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a Spansion product. Any

changes that have been made are the result of normal datasheet improvement and are noted in the

document revision summary, where supported. Future routine revisions will occur when appropriate,

and changes will be noted in a revision summary.

Continuity of Ordering Part Numbers

AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order

these products, please use only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about Spansion

memory solutions.

Publication Number

21534

Revision

Amendment

Issue Date

December 13, 2005

TABLE OF CONTENTS

Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 6

Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 7

Special Handling Instructions for FBGA Package .......................... 8

Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 9

Device Bus Operations . . . . . . . . . . . . . . . . . . . . . 10

Word/Byte Configuration .............................................................. 10

Requirements for Reading Array Data ......................................... 10

Writing Commands/Command Sequences .................................. 11

Simultaneous Read/Write Operations

with Zero Latency .........................................................................11

Standby Mode .............................................................................. 11

Automatic Sleep Mode .................................................................11

RESET#: Hardware Reset Pin .....................................................12

Output Disable Mode ...................................................................12

Autoselect Mode .......................................................................... 17

Sector/Sector Block Protection and Unprotection ........................ 18

Write Protect (WP#) .....................................................................19

Temporary Sector Unprotect ........................................................19

Figure 1. Temporary Sector Unprotect Operation................................. 19

Figure 2. In-System Sector Protection/

Sector Unprotection Algorithms ............................................................ 20

DQ6: Toggle Bit I .......................................................................... 32

Figure 6. Toggle Bit Algorithm .............................................................. 32

DQ2: Toggle Bit II ......................................................................... 33

Reading Toggle Bits DQ6/DQ2 .................................................... 33

DQ5: Exceeded Timing Limits ...................................................... 33

DQ3: Sector Erase Timer ............................................................. 33

Absolute Maximum Ratings . . . . . . . . . . . . . . . . 35

Figure 7. Maximum Negative Overshoot Waveform............................. 35

Figure 8. Maximum Positive Overshoot Waveform .............................. 35

DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 36

Figure 9. I

CC1

Current vs. Time (Showing Active and

Automatic Sleep Currents).................................................................... 37

Figure 10. Typical I

CC1

vs. Frequency................................................... 37

Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Figure 11. Test Setup .......................................................................... 38

Figure 12. Input Waveforms and Measurement Levels ........................ 38

AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 39

Figure 13. Read Operation Timings...................................................... 39

Figure 14. Reset Timings...................................................................... 40

Word/Byte Configuration (BYTE#) ............................................... 41

Figure 15. BYTE# Timings for Read Operations .................................. 41

Figure 16. BYTE# Timings for Write Operations .................................. 41

Erase and Program Operations ................................................... 42

Figure 17. Program Operation Timings ................................................

Figure 18. Accelerated Program Timing Diagram ................................

Figure 19. Chip/Sector Erase Operation Timings .................................

Figure 20. Back-to-back Read/Write Cycle Timings .............................

Figure 21. Data# Polling Timings (During Embedded Algorithms) .......

Figure 22. Toggle Bit Timings (During Embedded Algorithms) ............

Figure 23. DQ2 vs. DQ6 .......................................................................

SecSi

(Secured Silicon) Sector

Flash Memory Region ..................................................................21

Hardware Data Protection ............................................................22

Common Flash Memory Interface (CFI) . . . . . . . 22

Command Definitions . . . . . . . . . . . . . . . . . . . . . . 25

Reading Array Data ......................................................................25

Reset Command ..........................................................................26

Autoselect Command Sequence ..................................................26

Enter SecSi

Sector/Exit SecSi Sector

Command Sequence ...................................................................26

Byte/Word Program Command Sequence ................................... 26

Figure 3. Program Operation ................................................................ 27

Temporary Sector Unprotect ........................................................ 47

Figure 24. Temporary Sector Unprotect Timing Diagram..................... 47

Figure 25. Sector/Sector Block Protect and Unprotect Timing Diagram 48

Alternate CE# Controlled Erase and Program Operations ........... 49

Figure 26. Alternate CE# Controlled Write (Erase/Program)

Operation Timings ................................................................................ 50

Chip Erase Command Sequence .................................................27

Sector Erase Command Sequence ..............................................28

Erase Suspend/Erase Resume Commands ................................ 28

Figure 4. Erase Operation..................................................................... 29

Write Operation Status . . . . . . . . . . . . . . . . . . . . . 31

DQ7: Data# Polling ......................................................................31

Figure 5. Data# Polling Algorithm ......................................................... 31

Erase And Programming Performance . . . . . . . 51

Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 51

TSOP And SO Pin Capacitance . . . . . . . . . . . . . . 51

Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 52

FBD063—63-ball Fine-Pitch Ball Grid Array (FBGA) 8 x 14 mm . 52

TS 048—48-Pin Standard TSOP ................................................. 53

Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 54

RY/BY#: Ready/Busy# ................................................................. 32

December 13, 2005

Am29DL322D/323D/324D

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