3D7215Z-1.5 datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > logic> logic> 3D7215Z-1.5

3D7215Z-1.5: DescriptionMONOLITHIC 5-TAP FIXED DELAY LINE (SERIES 3D7215 - LOW NOISE); Categorylogic logic; File Size126KB，4 Pages; ManufacturerData Delay Devices

Download Datasheet Parametric View All

3D7215Z-1.5 Overview

MONOLITHIC 5-TAP FIXED DELAY LINE (SERIES 3D7215 - LOW NOISE)

3D7215Z-1.5 Parametric

Parameter Name	Attribute value
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Data Delay Devices
Parts packaging code	SOIC
package instruction	SOP,
Contacts	8
Reach Compliance Code	compliant
Input frequency maximum value (fmax)	23.8 MHz
JESD-30 code	R-PDSO-G8
length	4.88 mm
Logic integrated circuit type	SILICON DELAY LINE
Number of functions	1
Number of taps/steps	5
Number of terminals	8
Maximum operating temperature	70 °C
Minimum operating temperature
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	SOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
programmable delay line	NO
Certification status	Not Qualified
Maximum seat height	1.73 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	YES
technology	CMOS
Temperature level	COMMERCIAL
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
Total delay nominal (td)	13.5 ns
width	3.91 mm
Base Number Matches	1

Preview

Download Datasheet

View All

3D7215

MONOLITHIC 5-TAP

FIXED DELAY LINE

(SERIES 3D7215 – LOW NOISE)

FEATURES

•

All-silicon, low-power 5V CMOS technology

Vapor phase, IR and wave solderable

Auto-insertable (DIP pkg.)

Low ground bounce noise

Leading- and trailing-edge accuracy

Delay range:

1ns through 250ns

Delay tolerance:

2% or 1ns

Temperature stability:

±1%

typical (0C-70C)

Vdd stability:

±0.5%

typical (3.0V-3.6V)

Static Idd:

1.5ma typical

Minimum input pulse width:

20% of total delay

GND

PACKAGES

VDD

GND

VDD

3D7215Z-xx

SOIC

(150 Mil)

3D7215M-xx DIP (300 Mil)

For mechanical dimensions, click

here

For package marking details, click

here

FUNCTIONAL DESCRIPTION

The 3D7215 5-Tap Delay Line product family consists of fixed-delay 5V

CMOS integrated circuits. Each package contains a single delay line,

tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap

(incremental) delay values can range from 1ns through 50ns. The input

is reproduced at the outputs without inversion, shifted in time as per the

user-specified dash number. The 3D7215 is 5V CMOS-compatible and

features both rising- and falling-edge accuracy.

PIN DESCRIPTIONS

VDD

GND

N/C

Delay Line Input

Tap 1 Output (20%)

Tap 2 Output (40%)

Tap 3 Output (60%)

Tap 4 Output (80%)

Tap 5 Output (100%)

+5 Volts

Ground

No Connection

The all-CMOS 3D7215 integrated circuit has been designed as a

reliable, economic alternative to hybrid fixed delay lines. It is offered in

a standard 8-pin auto-insertable DIP and a space saving surface mount 8-pin SOIC.

TABLE 1: PART NUMBER SPECIFICATIONS

DASH #

3D7215Z-xx

3D7215M-xx

-1

-1.5

-2

-2.5

-3

-4

-5

-6

-8

-10

-12

-15

-20

-25

-30

-40

-50

DELAY SPECIFICATIONS

TOTAL

TAP-TAP

DELAY (ns)

4.0

1.0*

1.0

0.5

6.0

1.0*

1.5

0.7

8.0

1.0*

2.0

0.8

10.0

1.0*

2.5

1.0

12.0

1.0*

3.0

1.3

16.0

1.0*

4.0

1.3

20.0

1.0*

5.0

1.4

24.0

1.0*

6.0

1.4

40.0

1.0

8.0

1.4

50.0

1.0

10.0

1.5

60.0

1.2

12.0

1.5

75.0

1.5

15.0

1.5

100

2.0

20.0

2.0

125

2.5

25.0

2.5

150

3.0

30.0

3.0

200

4.0

40.0

4.0

250

5.0

50.0

5.0

INPUT RESTRICTIONS

RECOMMENDED

ABSOLUTE

Max Freq

Min P.W.

Max Freq

Min P.W.

27.8 MHz

18.0 ns

166.7 MHz

3.00 ns

23.8 MHz

21.0 ns

153.8 MHz

3.25 ns

20.8 MHz

24.0 ns

142.8 MHz

3.50 ns

18.5 MHz

27.0 ns

133.3 MHz

3.75 ns

16.7 MHz

30.0 ns

125.0 MHz

4.00 ns

13.9 MHz

36.0 ns

111.1 MHz

4.50 ns

11.9 MHz

42.0 ns

100.0 MHz

5.00 ns

10.4 MHz

48.0 ns

83.3 MHz

6.00 ns

8.33 MHz

60.0 ns

62.5 MHz

8.00 ns

6.67 MHz

75.0 ns

50.0 MHz

10.00 ns

5.56 MHz

90.0 ns

41.7 MHz

12.00 ns

4.42 MHz

113 ns

33.3 MHz

15.00 ns

3.33 MHz

150 ns

25.0 MHz

20.00 ns

2.66 MHz

188 ns

20.0 MHz

25.00 ns

2.22 MHz

225 ns

16.7 MHz

30.00 ns

1.67 MHz

300 ns

12.5 MHz

40.00 ns

1.33 MHz

375 ns

10.0 MHz

50.00 ns

* Total delay referenced to Tap1 output; Input-to-Tap1 = 7.5ns

1.5ns

NOTE: Any dash number between 1 and 50 not shown is also available as standard product

2002

Data Delay Devices

Doc #01015

11/8/01

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

Recommended Resources

Color TV brightness limiting circuit

Defibrillator circuit diagram

Low-power inverter circuit

phase locked function oscillator

Digital ultrasonic range finder

Color TV remote control 12

Infrared receiving and sending program: Infrared receiving and sending program...; renyiwenzhe MCU

How is nios designed?: Recently I used quatus to make a board that needed many I/O ports, but the chip I chose at the beginning did not have many I/O ports, so I wanted to make a NIOS core in the FPGA and send data to the n...; h_g_y Embedded System

I am new to pic32 and have encountered a problem. I hope you can give me some advice.: 1. I am using the Wi-Fi Comm Demo Board from Microchip. After installing the battery and turning on the switch, Led0 does not flash. I cannot find the ad hoc network signal using my iPod or laptop. Ho...; 古爪 Microchip MCU

Top-level module testing issues: How to test the intermediate signals of the called modules when testing the top-level module of fpga? I wrote a top-level module and called two instantiated modules as followsmodule top(flag_out,data,...; 573481734 FPGA/CPLD

I'm so sad. I got the board I was looking forward to, but it was damaged by the courier.: Finally got the board, and I opened the package excitedly. Three layers of packaging, it should be OK. The copper pillars on the bottom plate are installed. Prepare to plug in the power. Suddenly foun...; lxh2626 Embedded System

See why the buttons in this program don't work.: ////////////////////Stepper motor A, B forward and reverse debugging program///////////// #include/*****P4.0=A ;P1.5=B ;P1.6=A' ; P1.7=B'****/ code unsigned char zrun[4]={0x7f,0xbf,0xdf,0xef}; //Four-...; 15075018luerdu MCU

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components