Voltage on any terminal must be less than (V+) + 0.3V and greater than (V-) - 0.3V, at all times including before power is applied and V+ =V- = 0.0V. Vsupply
power supply needs to be sequenced on first on power turn-on and sequenced off last during power turn-off.
2.
See Switching Time Test Circuit. Break-before-make time is
not guaranteed. Turn on and turn off time may overlap.
3.
Guaranteed by design.
4.
See Charge Injection Test Circuit
5.
See Off Isolation Test Circuit
6.
See Crosstalk
Test Circuit.
7.
See switching time test circuit.
ALD4211/ALD4212
ALD4213
Advanced Linear Devices
3
AC ELECTRICAL CHARACTERISTICS
T
A
= 25
°
C V
+
= +5.0V, V
- =
GND = 0.0V unless otherwise specified
4211/4212/4213 (PC)
4211/4212/4213 (DC)
4211/4212/4213 (SC)
Parameter
Turn On
Delay time
Turn Off
Delay time
Break-Before-Make
Symbol
t
ON
Min
Typ
85
Max
170
Min
Typ
85
Max
170
Min
Typ
85
Max
170
Unit
ns
Test Conditions
(Note 7)
t
OFF
t
BD
Q
INJ
15
46
90
46
90
46
90
ns
(Note 7)
Delay Time
Charge Injection
Off Isolation
Crosstalk
Total Harmonic
Distortion
Com/Out
Off Capacitance
Channel On
Capacitance
Pin to Pin
Capacitance
40
0.2
75
90
1.0
15
40
0.2
75
90
0.05
0.01
1.0
15
40
0.2
75
90
0.05
0.01
1.0
ns
pC
dB
dB
%
(Note 3) (Note 4)
At f = 100KHz, (Note 5)
At f = 100KHz, (Note 6)
R
L
= 10K
R
L
= 100K
T
HD
0.05
0.01
COM(OFF)
OUT (OFF)
3.0
5.7
3.0
5.7
3.0
5.7
pF
pF
C
DS (ON)
C
PP
0.5
0.6
0.25
pF
The ALD4211/ALD4212/ALD4213
precision due to these factors:
feature very high
1. The analog switch has ultra low capacitive charge coupling
so that the charge stored on a 200pF sampling capacitor
is minimally affected.
2. With special charge balancing and charge cancellation
circuitry designed on chip, the ALD4211/ALD4212/
ALD4213 achieves ultra low charge injection of typically
only 0.2pC resulting in extremely low signal distortion to
the external circuit.
3. The analog switch switching transistors have pA leakage
currents minimizing the droop rate of the sampling circuit.
4. The internal switch timing allows for the analog switch to
turn off internally without producing any residual transistor
channel charge injection, which may affect external
circuits. With a low loss polystyrene or polypropylene
sampling capacitor, long data retention times are possible
without significant signal loss.
The ALD4211/ALD4212/ALD4213 CMOS analog switches,
when used with industry standard pinout connection, have
the input and output pins reversed with the signal source
input connected to OUT pins and COM pins used as output
pins. In this connection and when used with 1,000pF or
greater value capacitors, or when connected to a DC current
or resistive load, the switch would not be operating in an ultra
low charge injection mode. Typical charge injection, in this
case, would be 5pC as the pin to pin capacitive coupling
effect would dominate. In this connection, all the other
characteristics of the ALD4211/ALD4212/ALD4213 CMOS
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