Product Series 7-Channel Switching Regulator Controller for Digital Camera
Type
Package
Pin Assignment
Block Diagram
Application
Function
ＢＤ９７５９ＭＷＶ
Fig.1
Fig.2
Fig.3
Fig.4
●
3.3V minimum input operating
●
Contains cross converter(1ch),step-down converter(3ch),inverting(1ch),step-up converter(1ch),step-up converter for LED(1ch),
●
Contains LDO(1ch),constant current driver for LED(1ch)
●
Contains load switch for step-up converter
●
Contains output interception circuit when over load
●
It is possible separately control except CH1,CH2,CH3
●
Thermally enhanced UQFN056V7070 package(7mm x 7mm, 0.4mm pitch)
○ Absolute maximum ratings（Ta＝25℃）
Parameter
Power Supply Voltage
○ Recommended operating conditions
Units
V
V
V
V
V
V
V
V
mW
mW
℃
℃
Parameter
VREF Pin Connecting Capacitor
VREGA Pin Connecting Capacitor
SCP Pin Connecting Capacitor
REGOUT Pin Connecting Capacitor
LEDOUT Pin Connecting Capacitor
Symbol
VCC,PVCC
PVCCH,PVCCL
HX2,3,4
LX11
VOUT1,LX12
LX6,7
SWIN6,7
REGIN,LEDIN
Limits
－0.3½12
-0.3½15
－0.3½12
－0.3½12
－0.3½7
－0.3½20
－0.3½20
－0.3½12
420(*1)
930(*2)
－25½+85
－55½+150
Symbol
CVREF
CVREGA
CSCP
CREGOUT
CLEDOUT
Fosc
RT
VLX11
VVOUT1
VHX2,3,4
Ioutch1
Ioutch2
Ioutch3,4
Ioutch6
Ioutch7
ISWOUT6
ISWOUT7
MIN
0.47
0.47
0.001
0.47
0.47
0.6
47
－
3.9
Limits
TYP
1.0
1.0
－
1.0
1.0
1.2
68
－
－
－
－
－
－
－
－
－
－
MAX
4.7
4.7
2.2
10
10
1.5
120
10
5.5
10
1
600
500
100
50
100
50
Units
μF
μF
μF
μF
μF
MHz
kΩ
V
V
V
A
mA
mA
mA
mA
mA
mA
Power Input Voltage
Power Dissipation
Operating Temperature
Junction Temperature
Pd
Topr
Tstg
【Oscillator】
Oscillator Frequency
OSC Timing Resistor
【Driver】
LX11 Pin Input Voltage
CH1 Output set up area
HX2,3,4 Pin Input Voltage
(*1)Without external heat sink, the power dissipation reduces by 4.2mW/℃ over 25℃.
(*2) Reduced by 9.3mW/℃ over 25℃, when mounted on a PCB (70.0mm×70.0mm×1.6mm).
Recommended operating conditions
CH1 Output Current
CH2 Output Current
CH3,4 Output Current
CH6 Output Current
CH7 Output Current
【SW Circuit】
SWOUT6 Pin Source Current
SWOUT7 Pin Source Current
－
－
－
－
－
－
－
－
◎ It is strongly recommended that a capacitor be connect to VREF,VREGA pin to prevent oscillation.
※）The IC may not operate correctly by an unsettled state of the internal logic when voltage
is applied on VCC rapidly while STB pin is ON. Make sure STB pin is OFF in this case.
○ Recommended operating conditions
Parameter
Symbol
VCC,PVCC
Power Supply Voltage
PVCCL
PVCCH
Limit
3.3 ½ 10
3.75 ½ 14
VCC+3.75 ½ 14
Unit
V
V
V
Status of this document
The Japanese version of this document is the official specification. Please use the translation version of this document as a reference to expedite understanding of the official version.
If these are any uncertainty in translation version of this document, official version takes priority.
【Prevention Circuit of Miss Operation by Low Voltage Input】
Threshold Voltage１
Threshold Voltage 2
Threshold Voltage 3
【 Short Circuit
Protection
】
Timer Start Threshold
Voltage
SCP
Out
Source
Voltage
SCP Threshold Voltage
Stand by Voltage
【Oscillator】
Frequency CH1½4
Frequency CH5½7
Max duty 2,3,4（Step
Down）
Max duty 5,6,7
Max duty CH1 Lx11
Max duty CH1 Lx12
【Error AMP】
Input Bias Current
INV Threshold Voltage
1
INV Threshold Voltage
2
INV Threshold Voltage
3
IINV
VINV1
VINV2
VINV3
-
0.79
0.99
380
0
0.80
1.00
400
50
0.81
1.01
420
nA
V
V
mV
INV1½7,
NON5=7.0V
CH1½
4
CH6,7V
CH7I
fosc1
fosc2
Dmax1d
Dmax2
Dmax3
Dmax4
1.0
0.5
-
86
-
78
1.2
0.6
-
92
-
84
1.4
0.7
100
96
100
90
MHz
MHz
%
%
%
%
RT=68kΩ
RT=68kΩ
Vscp=0V
※
Vstd1
Vstd2
Vstd3
3.35
2.85
－
3.50
3.0
2.15
3.65
3.15
2.30
V
V
V
PVCCL
Monitor
PVCC
Monitor
VREGA
Monitor
CH1 Lx11 Pin Lowside SW
ON Resistance
CH1 Lx12 Pin Highside SW
ON Resistance
CH1 Lx12 Pin Lowside SW
ON Resistance
CH2,3,4 Highside SW
ON Resistance
CH2,3,4 Lowside SW
ON Resistance
CH6 NMOS SW ON Resistance
Vtc
Iscp
Vtsc
Vssc
2.1
0.5
0.45
－
2.2
1.0
0.50
22
2.3
1.5
0.55
170
V
μA
V
FB Pin
Monitor
VSCP=0.1V
CH7 NMOS SW ON Resistance
mV
CH5 Driver Output Voltage H
CH5 Driver Output Voltage L
【Regulator】
Feed back voltage 1
Maximum output current 1
Difference of input/output
voltage 1
Load stability 1
Ripple rejection
【Constant current driver】
Feed back Voltage 2
Maximum output current 2
Difference of input/output
voltage 2
-6.00
4.0
1.0
1.0
-5.91
12.5
7.5
-
V
mV
mV
mA
NON5 12kΩ
,
72kΩ
VBAT=4.8½
8.4V
Iref=10μ
A½
100μ
A
Vref=0V
VNF1
Imax1
ΔV1
Δvol1
RR1
0.98
-
-
-
40
1.0
-
150
10
50
1.02
150
300
50
-
V
mA
mV
mV
dB
Io=50mA
Io=0.1½10mA
f=120Hz,
VRR=-20dBV,
Io=1mA
VNF2
Imax2
ΔV2
380
-
-
400
-
100
420
50
200
mV
mA
mV
Io=10mA
【Base Bias Voltage Vref for Inverted Channel】
CH5 Output Voltage
Line Regulation
Load Regulation
Output Current when
shorted
【Soft Start】
CH1,2 Soft Start Time
CH3,4 Soft Start Time
CH5 Soft Start Time
CH6,7 Soft Start Time
Tss1,Tss2
Tss3、
Tss4
Tss5
Tss6,Tss7
3.4
1.2
4.4
4.4
4.4
2.2
5.4
5.4
5.4
3.2
6.6
6.6
msec
msec
msec
msec
RT=68kΩ
RT=68kΩ
RT=68kΩ
RT=68kΩ
VOUT5
DVLi
DVLo
Ios
-6.09
-
-
0.2
【Power on switch】
Driver
Voltage
Output
VSAT
ILEAK
VSAT
ILEAK
VSWIN6
-0.3
-
VSWIN7
-0.3
-
VSWIN6
-0.1
0
VSWIN7
-0.1
0
-
5
-
5
V
μA
V
μA
Io=20mA
VSWIN6=5V
STB6=0V
Io=10mA
VSWIN7=10V
STB7=0V
SWOUT6
OFF Leak Current
Driver
Voltage
Output
SWOUT7
OFF Leak Current
【 Ｔ 】
Ｓ Ｂ
STB
control
Voltage 1
Active
Non Active
VSTBH1
VSTBL1
RSTB1
VSTBH2
VSTBL2
RSTB2
2.0
-0.3
250
2.0
-0.3
250
-
-
400
-
-
400
11
0.3
700
11
0.3
700
V
STB123,4,5,6,7
V
kΩ
V
STBREG,LED
V
kΩ
STBREG,LED
STB123,4,5,6,7
STB Pull down Resistance 1
STB
control
Voltage 2
Active
Non Active
STB Pull down Resistance 2
【Circuit Current】
STAND-by Current 1
Circuit Current 1
（ VCC,PVCC current when
voltage supplied for the
terminal）
Stand-by Current 2
（PVCCL current when voltage
supplied for the terminal）
Circuit Current 3
（PVCCH current when voltage
supplied for the terminal）
ISTB1
-
-
5
μA
STB1½7=0V
INV=2.5V,
NON=-0.3V
INV=2.5V,
NON=-0.3V
PVCCL=5.0V
INV=2.5V,
NON=-0.3V
PVCCH=10V
Icc1
-
10
15
mA
Icc2
-
95
150
ΜA
Icc3
-
150
300
μA
(※1)The protective circuit start working when circuit is operated by 100% duty. So it is possible to use only for transition time shorter than charge time for SCP.
◎This product is not designed for normal operation with in a radioactive environment.
REV. A
3/4
○ Block Diagram
○ Package
BD9759MW
LOT No.
Fig.1
Fig.2
○ Pin Description
Pin Name
VCC
PVCC
PVCCH
PVCCL
PGND1,23,4,56
,7
○ Pin Assignment
42
41
40
39
38
37
36
35
34
33
32
31
30
29
NON5
INV6
INV7
INV4
INV3
VREF5
INV7I
Description
Power supply
Power supply for the output circuit
Power supply for the output circuit
(High side)
Power supply for the output circuit
(Low side)
Pin Name
VOUT1
Lx2,3,4,6,7
INV 1½4,6,7
INV7I
NON5
Lx11
Lx12
RT
SCP
STBREG
STBLED
STB123,
4,5,6,7
SWIN6,7
SWOUT6,7
CMINUS
-
Description
CH1 output voltage
Terminal for connecting inductors
Error AMP inverted input
Error AMP inverted input
Error AMP non inverted input
Terminal for connecting inductor for CH1 input
Terminal for connecting inductor for CH1 output
For connecting a register to set the OSC freqency
For connecting a capacitor to set up the delay time
of the SCP
43
44
45
46
47
48
49
50
51
52
53
54
55
56
VREGA
INV2
VCC
GND
SCP
INV1
PVCC
OUT1H
LX11
LX11
PGND1
STB7
STB6
STB5
OUT5
PGND56
LX6
SWIN6
SWOUT6
SWOUT7
SWIN7
LX7
PGND7
LEDREF
REGOUT
REGADJ
RT
28
27
26
25
24
23
22
21
20
19
18
17
16
Ground terminal for internal FET
GND
VREGA
OTHOT
U1,U5
REGIN
REGOUT
REGADJ
LEDIN
LEDOUT
LEDREF
Hx2,3,4
VREF5
Ground terminal
VREGA output
Terminal for connecting gate of
OUT1H, OUT5 PMOS
BD9759MWV
PGND1
LX12
LX12
VOUT1
HX4
LX4
PGND4
CMINUS
Input terminal for REG
Output terminal for REG
Feed back terminal for REG
Input terminal for LED
Output terminal for LED
Feed back terminal for LED
Input terminal for synchronous High
side switch
REG ON/OFF switch Active
‘H’
LED ON/OFF switch Active
‘H’
CH1½CH7 ON/OFF switch Active
‘H’
Input terminal for Lord SW
Output Terminal for Load SW
Terminal for connecting capacitor for Charge Pump
STBREG
PGND23
STBLED
1
2
3
4
5
6
7
8
9
10
11
12
13
Base bias voltage
-
Fig.3
REV. A
STB123
14
PVCCL
LEDOUT
LEDIN
PVCCH
15
REGIN
STB4
HX3
LX3
LX2
HX2
4/4
○
Operation Notes
１.) Absolute maximum ratings
This product is produced with strict quality control. However, the IC may be destroyed if operated beyond its absolute
maximum ratings. If the device is destroyed by exceeding the recommended maximum ratings, the failure mode will be difficult
to determine. (E.g. short mode, open mode) Therefore, physical protection counter-measures (like fuse) should be implemented
when operating conditions beyond the absolute maximum ratings anticipated.
２.) GND potential
Make sure GND is connected at lowest potential. All pins except NON5, must not have voltage below GND. Also, NON5 pin must
not have voltage below - 0.3V on start up.
３.) Setting of heat
Make sure that power dissipation does not exceed maximum ratings.
４.) Pin short and mistake fitting
Avoid placing the IC near hot part of the PCB. This may cause damage to IC. Also make sure that the output-to-output and output
to GND condition will not happen because this may damage the IC.
５.) Actions in strong magnetic field
Exposing the IC within a strong magnetic field area may cause malfunction.
６.) Mutual impedance
Use short and wide wiring tracks for the main supply and ground to keep the mutual impedance as small as possible. Use inductor
and capacitor network to keep the ripple voltage minimum.
７.) Voltage of STB pin
The threshold voltages of STB pin are 0.3V and 1.5V. STB state is set below 0.3V while action state is set beyond 1.5V.
The region between 0.3V and 1.5V is not recommended and may cause improper operation.
The rise and fall time must be under 10msec. In case to put capacitor to STB pin, it is recommended to use under 0.01μF.
８.) Thermal shutdown circuit (TSD circuit)
The IC incorporates a built-in thermal shutdown circuit (TSD circuit). The thermal shutdown circuit (TSD circuit) is designed only
to shut the IC off to prevent runaway thermal operation. It is not designed to protect the IC or guarantee its operation. Do not
continue to use the IC after operating this circuit or use the IC in an environment where the operation of this circuit is assumed.
９.)Rush current at the time of power supply injection.
An IC which has plural power supplies, or CMOS IC could have momentary rush current at the time of power supply injection.
Please take care about power supply coupling capacity and width of power Supply and GND pattern wiring.
１０.)IC Terminal Input
This IC is a monolithic IC that has a P- board and P+ isolation for the purpose of keeping distance between elements. A P-N junction
is formed between the P-layer and the N-layer of each element, and various types of parasitic elements are then formed.
For example, an application where a resistor and a transistor are connected to a terminal (shown in Fig.15):
○When GND > (terminal A) at the resistor and GND > (terminal B) at the transistor (NPN), the P-N junction operates as
a parasitic diode.
○When GND > (terminal B) at the transistor (NPN), a parasitic NPN transistor operates as a result of the NHayers of other
elements in the proximity of the aforementioned parasitic diode.
Parasitic elements are structurally inevitable in the IC due to electric potential relationships. The operation of parasitic elements
Induces the interference of circuit operations, causing malfunctions and possibly the destruction of the IC. Please be careful not to
use the IC in a way that would cause parasitic elements to operate. For example, by applying a voltage that is lower than the
GND (P-board) to the input terminal.
Resistor
（Terminal
A）
Transistor (NPN)
B
（Terminal
B）
C
E
GND
（TerminalＡ）
Parasitic element
N
GND
P
＋
N
N
P-board
P
P
＋
N
Parasitic element
Ｎ
P
＋
N
P
P-board
P
＋
Parasitic element
GND
Fig . 3 Simplified structure of a Bipolar IC
REV. A
½
½
N
Notice
Notes
No copying or reproduction of this document, in part or in whole, is permitted without the
consent of ROHM Co.,Ltd.
The content specified herein is subject to change for improvement without notice.
The content specified herein is for the purpose of introducing ROHM's products (hereinafter
"Products"). If you wish to use any such Product, please be sure to refer to the specifications,
which can be obtained from ROHM upon request.
Examples of application circuits, circuit constants and any other information contained herein
illustrate the standard usage and operations of the Products. The peripheral conditions must
be taken into account when designing circuits for mass production.
Great care was taken in ensuring the accuracy of the information specified in this document.
However, should you incur any damage arising from any inaccuracy or misprint of such
information, ROHM shall bear no responsibility for such damage.
The technical information specified herein is intended only to show the typical functions of and
examples of application circuits for the Products. ROHM does not grant you, explicitly or
implicitly, any license to use or exercise intellectual property or other rights held by ROHM and
other parties. ROHM shall bear no responsibility whatsoever for any dispute arising from the
use of such technical information.
The Products specified in this document are intended to be used with general-use electronic
equipment or devices (such as audio visual equipment, office-automation equipment, commu-
nication devices, electronic appliances and amusement devices).
The Products specified in this document are not designed to be radiation tolerant.
While ROHM always makes efforts to enhance the quality and reliability of its Products, a
Product may fail or malfunction for a variety of reasons.
Please be sure to implement in your equipment using the Products safety measures to guard
against the possibility of physical injury, fire or any other damage caused in the event of the
failure of any Product, such as derating, redundancy, fire control and fail-safe designs. ROHM
shall bear no responsibility whatsoever for your use of any Product outside of the prescribed
scope or not in accordance with the instruction manual.
The Products are not designed or manufactured to be used with any equipment, device or
system which requires an extremely high level of reliability the failure or malfunction of which
may result in a direct threat to human life or create a risk of human injury (such as a medical
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