LMU12EC65 datasheet, PDF - EEWORLD Datasheet

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LMU12EC65: DescriptionMultiplier, 12-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68; CategoryMicrocontrollers and processors; File Size223KB，6 Pages; ManufacturerLOGIC Devices; Websitehttp://www.logicdevices.com/

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LMU12EC65 Overview

Multiplier, 12-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68

LMU12EC65 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	LOGIC Devices
Parts packaging code	PGA
package instruction	PGA, PGA68,11X11
Contacts	68
Reach Compliance Code	unknown
Is Samacsys	N
Other features	2 X 12 BIT DATA INPUT BUS; ICC SPECIFIED @ 5MHZ
boundary scan	NO
External data bus width	12
JESD-30 code	S-CPGA-P68
JESD-609 code	e0
length	29.464 mm
low power mode	NO
Humidity sensitivity level	3
Number of terminals	68
Maximum operating temperature	70 °C
Minimum operating temperature
Output data bus width	24
Package body material	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA
Encapsulate equivalent code	PGA68,11X11
Package shape	SQUARE
Package form	GRID ARRAY
Peak Reflow Temperature (Celsius)	225
power supply	5 V
Certification status	Not Qualified
Maximum seat height	3.81 mm
Maximum slew rate	25 mA
Maximum supply voltage	5.25 V
Minimum supply voltage	4.75 V
Nominal supply voltage	5 V
surface mount	NO
technology	CMOS
Temperature level	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG
Terminal pitch	2.54 mm
Terminal location	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED
width	29.464 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, MULTIPLIER
Base Number Matches	1

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LMU12EC65 Related Products

	LMU12EC65	LMU12EC35	LMU12EC45
Description	Multiplier, 12-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68	Multiplier, 12-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68	Multiplier, 12-Bit, CMOS, CPGA68, CAVITY-DOWN, CERAMIC, PGA-68
Is it Rohs certified?	incompatible	incompatible	incompatible
Maker	LOGIC Devices	LOGIC Devices	LOGIC Devices
Parts packaging code	PGA	PGA	PGA
package instruction	PGA, PGA68,11X11	PGA, PGA68,11X11	PGA, PGA68,11X11
Contacts	68	68	68
Reach Compliance Code	unknown	unknown	unknown
Is Samacsys	N	N	N
Other features	2 X 12 BIT DATA INPUT BUS; ICC SPECIFIED @ 5MHZ	2 X 12 BIT DATA INPUT BUS; ICC SPECIFIED @ 5MHZ	2 X 12 BIT DATA INPUT BUS; ICC SPECIFIED @ 5MHZ
boundary scan	NO	NO	NO
External data bus width	12	12	12
JESD-30 code	S-CPGA-P68	S-CPGA-P68	S-CPGA-P68
JESD-609 code	e0	e0	e0
length	29.464 mm	29.464 mm	29.464 mm
low power mode	NO	NO	NO
Humidity sensitivity level	3	3	3
Number of terminals	68	68	68
Maximum operating temperature	70 °C	70 °C	70 °C
Output data bus width	24	24	24
Package body material	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED	CERAMIC, METAL-SEALED COFIRED
encapsulated code	PGA	PGA	PGA
Encapsulate equivalent code	PGA68,11X11	PGA68,11X11	PGA68,11X11
Package shape	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY
Peak Reflow Temperature (Celsius)	225	225	225
power supply	5 V	5 V	5 V
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	3.81 mm	3.81 mm	3.81 mm
Maximum slew rate	25 mA	25 mA	25 mA
Maximum supply voltage	5.25 V	5.25 V	5.25 V
Minimum supply voltage	4.75 V	4.75 V	4.75 V
Nominal supply voltage	5 V	5 V	5 V
surface mount	NO	NO	NO
technology	CMOS	CMOS	CMOS
Temperature level	COMMERCIAL	COMMERCIAL	COMMERCIAL
Terminal surface	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)	Tin/Lead (Sn/Pb)
Terminal form	PIN/PEG	PIN/PEG	PIN/PEG
Terminal pitch	2.54 mm	2.54 mm	2.54 mm
Terminal location	PERPENDICULAR	PERPENDICULAR	PERPENDICULAR
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED	NOT SPECIFIED
width	29.464 mm	29.464 mm	29.464 mm
uPs/uCs/peripheral integrated circuit type	DSP PERIPHERAL, MULTIPLIER	DSP PERIPHERAL, MULTIPLIER	DSP PERIPHERAL, MULTIPLIER
Base Number Matches	1	1	1

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