EEWORLDEEWORLDEEWORLD

Part Number

Search

531EA1331M00DG

Description
LVPECL Output Clock Oscillator, 1331MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
Categoryoscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531EA1331M00DG Overview

LVPECL Output Clock Oscillator, 1331MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531EA1331M00DG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
package instructionROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Codeunknown
Is SamacsysN
Other featuresTRAY
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability50%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency1331 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeLVPECL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage2.75 V
Minimum supply voltage2.25 V
Nominal supply voltage2.5 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
Base Number Matches1
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
Newbie UC3845 help
There are two instruments that use UC3845 (14-pin SMD) for power control. Both have the problem of power supply not oscillating. One of them checked the peripheral components and found no obvious bad ...
jack007kkk Power technology
【R7F0C809】Test timer
[i=s] This post was last edited by Qiangzi00001 on 2015-9-15 00:07 [/i] [align=left][font=宋体] Today I saw the function of the Raysa R7F0C8096 timer, which is quite powerful [/font]:pleased::pleased: [...
强仔00001 Renesas Electronics MCUs
About using PCI1670 data acquisition card to control F18 bridge
The original F18 bridge was controlled by Axiomtek's AX5488 acquisition card, and the initialization settings were as follows (GPIB address is 4): Addr1 = 4 Flag = ibinit((2 * 16 ^ 2 + 14 * 16 + 1), 2...
nwuwmz Embedded System
Latest ESP32/ESP8266 download software
刚找到的最新下载软件,支持ESP32.[list] [*][url=http://espressif.com/sites/default/files/tools/flash_download_tools_v3.4.1_win.zip]Flash Download Tools V3.4.1 (ESP8266 & ESP32)[/url] [*][url=http://espressif.com/si...
dcexpert MicroPython Open Source section
Sampling circuit
Why is the amplifier output always 1.68? Please help! ! ! !...
SYH123123 Analog electronics
Looking for power line carrier source program based on ST7538
As the title says, I want the source code of the power line carrier based on ST7538. Main function, function library and header file are all OK. Please take a look....
大能苗 MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2452  2272  1640  2275  130  50  46  34  3  47 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号