EEWORLDEEWORLDEEWORLD

Part Number

Search

CDR31BP101BJMRAR

Description
CAP CER 100PF 100V BP 0805
CategoryPassive components   
File Size234KB,37 Pages
ManufacturerVishay
Websitehttp://www.vishay.com
Environmental Compliance
Download Datasheet Parametric View All

CDR31BP101BJMRAR Overview

CAP CER 100PF 100V BP 0805

CDR31BP101BJMRAR Parametric

Parameter NameAttribute value
capacitance100pF
Tolerance±5%
Voltage - Rated100V
Temperature CoefficientBP
Operating temperature-55°C ~ 125°C
characteristic-
grade-
applicationUniversal
failure rateR(0.01%)
Installation typeSurface mount, MLCC
Package/casing0805 (2012 Metric)
size/dimensions0.079" long x 0.049" wide (2.00mm x 1.25mm)
Height - Installation (maximum)-
Thickness (maximum)0.051"(1.30mm)
lead spacing-
Lead form-
notifyThere is currently market demand for these product types, so lead times will change and extend. Lead times may vary.
CDR-MIL-PRF-55681
www.vishay.com
Vishay Vitramon
Surface Mount Multilayer Ceramic Chip Capacitors
MIL Qualified, Type CDR
FEATURES
• Military qualified products
• Federal stock control number,
CAGE CODE 2770A
• High reliability tested per MIL-PRF-55681
• Tin / lead termination codes “W”, “Z”, and “U”
• Lead (Pb)-free termination codes “Y” and “M”
• Wet build process
• Reliable Noble Metal Electrode (NME) system
• Material categorization: for definitions of compliance
please see
www.vishay.com/doc?99912
Note
*
This datasheet provides information about parts that are
RoHS-compliant and / or parts that are non RoHS-compliant. For
example, parts with lead (Pb) terminations are not RoHS-compliant.
Please see the information / tables in this datasheet for details
Available
Available
APPLICATIONS
• Avionic systems
• Sonar systems
• Satellite systems
• Missiles applications
• Geographical information systems
• Global positioning systems
ELECTRICAL SPECIFICATIONS
Note
Electrical characteristics at +25 °C unless otherwise specified
Operating Temperature:
-55 °C to +125 °C
Capacitance Range:
1.0 pF to 470 nF
Voltage Range:
6.3 V
DC
to 100 V
DC
Temperature Coefficient of Capacitance (TCC):
BP: 0 ppm/°C ± 30 ppm/°C from -55 °C to +125 °C,
with 0 V
DC
applied
0 ppm/°C ± 30 ppm/°C from -55 °C to +125 °C,
with 100 % rated V
DC
applied
BX: ± 15 % from -55 °C to +125 °C, with 0 V
DC
applied
BX: +15 %, -25 % from -55 °C to +125 °C,
with 100 % rated V
DC
applied
BR: ± 15 % from -55 °C to +125 °C,
with 0 V
DC
applied
+15 %, -40 % -55 °C to +125 °C,
with 100 % rated V
DC
applied
Dissipation Factor (DF):
BP: 0.15 % maximum
BX: 2.50 % maximum
BR:
25 V: 3.5 % maximum
> 25 V: 2.5 % maximum
Test frequency:
1 MHz ± 50 kHz for BP capacitors
1000 pF
and for BX capacitors
100 pF
All other BP, BX, and BR at 1 kHz ± 50 Hz
Aging Rate:
BP: 0 % maximum per decade
BX, BR: 1 % maximum per decade
Insulation Resistance (IR):
at +25 °C and rated voltage 100 000 M minimum or
1000
F,
whichever is less
Dielectric Strength Test:
performed per method 103 of EIA-198-2-E.
Applied test voltages:
100 V
DC
-rated: 250 % of rated voltage
Revision: 14-May-2018
Document Number: 45026
1
For technical questions, contact:
mlcc@vishay.com
THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT
ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT
www.vishay.com/doc?91000
FPGA Example: First-hand Experience that Can Be Directly Used in Engineering Projects
Preface Part I Basic Knowledge Chapter 1 Overview of FPGA Development 2 1.1 Introduction to FPGA Basics 2 1.2 Advantages and Limitations of FPGA 6 1.3 Skills Required for FPGA Development 7 FPGA Appli...
白丁 FPGA/CPLD
Is it possible to take the first-level registered electronic engineer exam in college?
How about taking the first-level registered electronic engineer qualification exam when I am in college? Do you think it is feasible? I am good at theory....
霖霖霖 Analog electronics
Why doesn't the timer interrupt in F28027 clear the interrupt flag to 0?
[align=left][color=#000]The example program is as follows: [/color][/align][align=left][color=#000]interrupt void cpu_timer0_isr(void) { CpuTimer0.InterruptCount++; [/color][/align][align=left][color=...
nemo1991 Microcontroller MCU
SAM4E LED0 brightness automatically adjusts with light (TWI reads bh1750)
[i=s]This post was last edited by Thoreau Walden on 2015-2-28 13:40[/i] Nowadays, all smartphones have light intensity sensors. Basically, in places with strong light, the screen is also bright, so it...
梭罗瓦尔登 Microchip MCU
Has anyone used the AFE5801 chip?
[i=s]This post was last edited by dontium on 2015-1-23 12:41[/i] The original poster has encountered a very difficult problem. When debugging with the AFE5801 chip, the SPI signal cannot be read. . . ...
nuaakhai Analogue and Mixed Signal
Image data cache
Regarding the image cache problem, when using FPGA for image processing, image data cache is required. Generally, FIFO or dual-port RAM is used for cache. I now want to read image data directly from t...
yuechenping FPGA/CPLD

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 2524  2928  808  1902  1450  51  59  17  39  30 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号