AX1000-2BGG729I datasheet, PDF

Datasheet> All Categories > Programmable logic devices> Programmable logic> AX1000-2BGG729I

AX1000-2BGG729I: DescriptionField Programmable Gate Array, 12096 CLBs, 1000000 Gates, 870MHz, 18144-Cell, CMOS, PBGA729; CategoryProgrammable logic devices Programmable logic; File Size13MB，262 Pages; ManufacturerMicrochip; Websitehttps://www.microchip.com; Environmental Compliance

Download Datasheet Parametric View All

AX1000-2BGG729I Online Shopping

Suppliers	Part Number	Price	MOQ	In stock
	AX1000-2BGG729I	-	-	View	Buy Now

AX1000-2BGG729I Overview

Field Programmable Gate Array, 12096 CLBs, 1000000 Gates, 870MHz, 18144-Cell, CMOS, PBGA729

AX1000-2BGG729I Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	Microchip
package instruction	1.27 MM PITCH, ROHS COMPLIANT, PLASTIC, BGA-729
Reach Compliance Code	compli

Preview

Download Datasheet

View All

Revision 18

Axcelerator Family FPGAs

Leading-Edge Performance

•

350+ MHz System Performance

500+ MHz Internal Performance

High-Performance Embedded FIFOs

700 Mb/s LVDS Capable I/Os

– Voltage-Referenced I/O Standards: GTL+, HSTL Class 1,

SSTL2 Class 1 and 2, SSTL3 Class 1 and 2

– Registered I/Os

– Hot-Swap Compliant I/Os (except PCI)

– Programmable Slew Rate and Drive Strength on Outputs

– Programmable Delay and Weak Pull-Up/Pull-Down Circuits

on Inputs

Embedded Memory:

– Variable-Aspect 4,608-bit RAM Blocks (x1, x2, x4, x9, x18,

x36 Organizations Available)

– Independent, Width-Configurable Read and Write Ports

– Programmable Embedded FIFO Control Logic

Segmentable Clock Resources

Embedded Phase-Locked Loop:

– 14-200 MHz Input Range

– Frequency Synthesis Capabilities up to 1 GHz

Deterministic, User-Controllable Timing

Unique In-System Diagnostic and Debug Capability with

Microsemi Silicon Explorer II

Boundary-Scan Testing Compliant with IEEE Standard 1149.1

(JTAG)

FuseLock™ Programming Technology Protects Against

Reverse Engineering and Design Theft

Specifications

Up to 2 Million Equivalent System Gates

Up to 684 I/Os

Up to 10,752 Dedicated Flip-Flops

Up to 295 kbits Embedded SRAM/FIFO

Manufactured on Advanced 0.15

μm

CMOS Antifuse Process

Technology, 7 Layers of Metal

Single-Chip, Nonvolatile Solution

Up to 100% Resource Utilization with 100% Pin Locking

1.5 V Core Voltage for Low Power

Footprint Compatible Packaging

Flexible, Multi-Standard I/Os:

– 1.5 V, 1.8 V, 2.5 V, 3.3 V Mixed Voltage Operation

– Bank-Selectable I/Os – 8 Banks per Chip

– Single-Ended I/O Standards: LVTTL, LVCMOS, 3.3V PCI,

and 3.3 V PCI-X

– Differential I/O Standards: LVPECL and LVDS

•

Features

•

Table 1 • Axcelerator Family Product Profile

Device

Capacity (in Equivalent System Gates)

Typical Gates

Modules

Combinatorial (C-cells)

Maximum Flip-Flops

Embedded RAM/FIFO

Number of Core RAM Blocks

Total Bits of Core RAM

Clocks (Segmentable)

Hardwired

Routed

PLLs

I/Os

I/O Banks

Maximum User I/Os

Maximum LVDS Channels

Total I/O Registers

Package

AX125

AX250

AX500

AX1000

AX2000

125,000

82,000

672

1,344

18,432

168

504

250,000

154,000

1,408

2,816

55,296

248

124

744

208

500,000

286,000

2,688

5,376

73,728

336

168

1,008

208

484, 676

208, 352

1,000,000

612,000

6,048

12,096

165,888

516

258

1,548

2,000,000

1,060,000

10,752

21,504

294,912

684

342

2,052

256, 324

256, 484

208, 352

729

484, 676, 896

352

624

896, 1152

256, 352

624

March 2012

Axcelerator Family FPGAs

Table of Contents

General Description

Device Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Design Environment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

1-1

1-7

1-8

Detailed Specifications

Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

Thermal Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

I/O Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9

Voltage-Referenced I/O Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-43

Differential Standards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-50

Module Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-54

Routing Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-61

Global Resources . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-66

Axcelerator Clock Management System . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-75

Embedded Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-86

Other Architectural Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-106

Programming . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-110

Package Pin Assignments

BG729 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1

FG256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9

FG324 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16

FG484 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-21

FG676 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-37

FG896 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-52

FG1152 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-71

PQ208 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-84

CQ208 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-89

CQ256 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-94

CQ352 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-98

CG624 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-115

Datasheet Information

List of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

Datasheet Categories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7

Safety Critical, Life Support, and High-Reliability Applications Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-7

R ev i si o n 1 8

Recommended Resources

Motor inching control circuit

The main circuit of traditional relay type altar washing machine

Pyroelectric infrared induction automatic light circuit (5)

Electronic vehicle fuel gauge

555 photosensitive oscillator circuit

Computer motherboard circuit diagram 820 1_10

Shortcut: E0 E1 E2 E3 E4 E5 E6 E7 E8 E9 EA EB EC ED EE EF EG EH EI EJ EK EL EM EN EO EP EQ ER ES ET EU EV EW EX EY EZ F0 F1 F2 F3 F4 F5 F6 F7 F8 F9 FA FB FC FD FE FF FG FH FI FJ FK FL FM FN FO FP FQ FR FS FT FU FV FW FX FY FZ G0 G1 G2 G3 G4 G5 G6 G7 G8 G9 GA GB GC GD GE GF GG GH GI GJ GK GL GM GN GO GP GQ GR GS GT GU GV GW GX GZ H0 H1 H2 H3 H4 H5 H6 H7 H8 HA HB HC HD HE HF HG HH HI HJ HK HL HM HN HO HP HQ HR HS HT HU HV HW HX HY HZ I1 I2 I3 I4 I5 I6 I7 IA IB IC ID IE IF IG IH II IK IL IM IN IO IP IQ IR IS IT IU IV IW IX J0 J1 J2 J6 J7 JA JB JC JD JE JF JG JH JJ JK JL JM JN JP JQ JR JS JT JV JW JX JZ K0 K1 K2 K3 K4 K5 K6 K7 K8 K9 KA KB KC KD KE KF KG KH KI KJ KK KL KM KN KO KP KQ KR KS KT KU KV KW KX KY KZ

Popular Components