BGA7204
400 MHz to 2750 MHz high linearity variable gain amplifier
Rev. 4 — 15 November 2016
Product data sheet
1. Product profile
1.1 General description
The BGA7204 MMIC is an extremely linear Variable Gain Amplifier (VGA), operating from
0.4 GHz to 2.75 GHz. At minimum attenuation it has a gain of 18.5 dB, an output IP3 of
38 dBm and a noise figure of 7 dB. The attenuation range is 31.5 dB with an
attenuation step of 0.5 dB.
The gain control is offered through a digital parallel interface or a digital serial interface
(SPI). The digital serial interface offers advanced features like reprogramming the
attenuation curve and on-chip temperature monitoring. The interfaces can be combined to
support response to fast fading. The serial interface can be used to pre-set the desired
gain level, whereas the parallel interface can be used to select this gain setting in 0.15
s.
It has been designed and qualified for the severe mission profile of cellular base stations,
but its outstanding RF performance and interfacing flexibility makes it suitable for a wide
variety of applications.
The BGA7204 is housed in a 32 pins 5 mm
5 mm leadless HVQFN package.
1.2 Features and benefits
High output IP3 of 38 dBm
Attenuation range of 31.5 dB
Output power at 1 dB compression of 21 dBm
Noise figure of 7 dB at minimum attenuation
Single 5 V supply
Digital parallel and digital serial control (SPI)
Programmable attenuation curve
Temperature sensor
ESD protection on all pins (HBM > 2 kV)
Moisture sensitivity level 1
Compliant to Directive 2002/95/EC, regarding Restriction of Hazardous Substances
(RoHS)
1.3 Applications
IF and RF applications
WiMAX and cellular base stations
Cable modem termination systems
Temperature compensation circuits
NXP Semiconductors
BGA7204
400 MHz to 2750 MHz high linearity variable gain amplifier
1.4 Quick reference data
Table 1.
Quick reference data
4.75 V
V
SUP
5.25 V; f = 400 MHz to 2750 MHz;
40
C
T
amb
+85
C; input and output are terminated with 50
,
unless otherwise specified.
Symbol
V
SUP
I
CC(tot)
T
amb
G
p
Parameter
supply voltage
total supply current
ambient temperature
power gain
minimum attenuation
400 MHz
f
1450 MHz
1450 MHz
f
2100 MHz
2100 MHz
f
2750 MHz
range
attenuation range
400 MHz
f
1450 MHz
1450 MHz
f
2100 MHz
2100 MHz
f
2750 MHz
step
NF
attenuation step
noise figure
minimum attenuation
400 MHz
f
700 MHz
700 MHz
f
2100 MHz
2100 MHz
f
2750 MHz
IP3
O
output third-order intercept point
minimum attenuation
400 MHz
f
700 MHz
700 MHz
f
1450 MHz
1450 MHz
f
2100 MHz
2100 MHz
f
2750 MHz
P
L(1dB)
output power at 1 dB gain compression
minimum attenuation
400 MHz
f
1450 MHz
1450 MHz
f
2100 MHz
2100 MHz
f
2750 MHz
[1]
[2]
Absolute maximum DC voltage on pin RF_OUT and V
DD
.
f
= 1 MHz; P
i
=
12
dBm per tone.
[2]
[2]
[2]
[2]
Conditions
[1]
Min
4.75
-
-
40
16
15
14
29
28
27
0
-
-
-
34
33
31
28.5
19
18
17.5
Typ
5.0
115
15
+25
18.5
17.5
16.5
31.5
30.5
30.0
0.5
7
6.5
7.0
38
37.5
36
34
21
20.5
20
Max
5.25
133
-
+85
21
20
19
34
33
33
1
9.5
9
10
-
-
-
-
-
-
-
Unit
V
mA
mA
C
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
dBm
dBm
dBm
dBm
dBm
dBm
PWRDN = 0
PWRDN = 1
BGA7204
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 15 November 2016
2 of 27
NXP Semiconductors
BGA7204
400 MHz to 2750 MHz high linearity variable gain amplifier
2. Pinning information
2.1 Pinning
29 AMP_OUT
26 SER_IN
27 LE/SS
32 GND
31 GND
30 GND
28 GND
terminal 1
index area
GND
GND
GND
GND
n.c.
n.c.
SPICONFIG
PWRDN
1
2
3
4
5
6
7
8
25 CLK
24 PSCONFIG
23 D0
22 D1
21 D2
20 D3
19 D4
18 D5
17 V
DD
PUP1 16
aaa-001426
BGA7204
GND 10
GND 11
ATT_IN 12
GND 13
SER_OUT 14
Transparent top view
Fig 1.
Pin configuration
2.2 Pin description
Table 2.
Symbol
GND
n.c.
SPICONFIG
PWRDN
ATT_IN
SER_OUT
PUP2
PUP1
V
DD
D5
D4
D3
D2
D1
D0
PSCONFIG
CLK
Pin description
Pin
1, 2, 3, 4, 9, 10, 11, 13, 28, 30, 31, 32
5, 6
7
8
12
14
15
16
17
18
19
20
21
22
23
24
25
Description
Ground
not connected
set SPI mode
[1]
power-down RF section
[2]
RF input to attenuator
SPI data output
power-up control 2
power-up control 1
supply voltage
attenuation control word
[3]
attenuation control word
[3]
attenuation control word
[3]
attenuation control word
[3]
attenuation control word
[3]
attenuation control word
[3]
set digital gain control mode
[4]
SPI clock input
BGA7204
All information provided in this document is subject to legal disclaimers.
PUP2 15
GND
9
© NXP B.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 15 November 2016
3 of 27
NXP Semiconductors
BGA7204
400 MHz to 2750 MHz high linearity variable gain amplifier
Pin description
…continued
Pin
26
27
29
GND paddle
Description
SPI data input
latch enable or slave select
[5]
RF output of amplifier
exposed die pad
Table 2.
Symbol
SER_IN
LE/SS
AMP_OUT
GND
[1]
[2]
[3]
[4]
[5]
0 = extended; 1 = basic; unconnected pulled up.
0 = enabled; 1 = disabled; unconnected pulled down.
D5 = MSB; D0 = LSB; unconnected pulled down.
0 = parallel; 1 = SPI; unconnected pulled down.
parallel = LE; SPI = SS (active LOW); unconnected pulled up.
3. Ordering information
Table 3.
Ordering information
Name
BGA7204
HVQFN32
Description
plastic thermal enhanced very thin quad flat package;
no leads; 32 terminals; body 5
5
0.85 mm
Version
SOT617-3
Type number Package
4. Marking
Table 4.
BGA7204
Marking
Marking code
7204
*****
TSDyww
manufacturing code
yww = The actual assembly date code.
Description
Type number
BGA7204
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 15 November 2016
4 of 27
NXP Semiconductors
BGA7204
400 MHz to 2750 MHz high linearity variable gain amplifier
5. Limiting values
Table 5.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol
V
SUP
V
I
V
O
I
I
I
O
T
stg
T
j
P
i(RF)(ATT_IN)
V
ESD
Parameter
supply voltage
input voltage
output voltage
input current
output current
storage temperature
junction temperature
RF input power on pin ATT_IN
electrostatic discharge voltage
Human Body Model (HBM);
According JEDEC standard 22-A114E
Charged Device Model (CDM);
According JEDEC standard 22-C101B
[1]
[2]
[3]
[4]
[5]
Absolute maximum DC voltage on pin RF_OUT and V
DD
.
Absolute maximum DC voltage on pin SPICONFIG, PWRDN, D5, D4, D3, D2, D1, D0, PSCONFIG, CLK, SER_IN and LE/SS.
Absolute maximum DC voltage on pin SER_OUT.
Absolute maximum DC current through pin SPICONFIG, PWRDN, D5, D4, D3, D2, D1, D0, PSCONFIG, CLK, SER_IN and LE/SS.
Absolute maximum DC current through pin SER_OUT.
Conditions
[1]
[2]
[3]
[4]
[5]
Min
0.6
0.6
0.6
20
20
65
-
-
-
-
Max
+8
+8
+8
+20
+20
+150
150
30
4
2
Unit
V
V
V
mA
mA
C
C
dBm
kV
kV
6. Thermal characteristics
Table 6.
Symbol
R
th(j-sp)
[1]
Thermal characteristics
Parameter
thermal resistance from junction to solder point
Conditions
T
sp
85
C
[1]
Typ
10
Unit
K/W
T
sp
is the temperature at the solder point.
7. Static characteristics
Table 7.
Symbol
V
SUP
I
CC(tot)
T
amb
I
DD
Static characteristics
Parameter
supply voltage
total supply current
ambient temperature
supply current
on pin V
DD
PWRDN = 0
PWRDN = 1
on pin AMP_OUT
PWRDN = 0
PWRDN = 1
BGA7204
All information provided in this document is subject to legal disclaimers.
Conditions
[1]
Min
4.75
-
-
40
-
-
-
-
Typ
5.0
115
15
+25
43
15
72
0.05
Max
5.25
133
-
+85
-
-
-
-
Unit
V
mA
mA
C
mA
mA
mA
mA
PWRDN = 0
PWRDN = 1
© NXP B.V. 2016. All rights reserved.
Product data sheet
Rev. 4 — 15 November 2016
5 of 27
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