EEWORLDEEWORLDEEWORLD

Part Number

Search

LT1579CS8-3.3#TRPBF

Description
IC LDO REG SMART DUAL 3.3V 8SOIC
CategoryPower/power management    The power supply circuit   
File Size291KB,20 Pages
ManufacturerLinear ( ADI )
Websitehttp://www.analog.com/cn/index.html
Environmental Compliance
Download Datasheet Parametric View All

LT1579CS8-3.3#TRPBF Overview

IC LDO REG SMART DUAL 3.3V 8SOIC

LT1579CS8-3.3#TRPBF Parametric

Parameter NameAttribute value
Brand NameLinear Technology
Is it Rohs certified?conform to
MakerLinear ( ADI )
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Manufacturer packaging codeS8
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum drop-back voltage 10.75 V
Maximum input voltage20 V
Minimum input voltage3.8 V
JESD-30 codeR-PDSO-G8
JESD-609 codee3
length4.9 mm
Humidity sensitivity level1
Number of functions1
Number of terminals8
Working temperatureTJ-Max125 °C
Working temperature TJ-Min
Maximum output current 10.3 A
Maximum output voltage 13.4 V
Minimum output voltage 13.2 V
Nominal output voltage 13.3 V
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Regulator typeFIXED POSITIVE SINGLE OUTPUT LDO REGULATOR
Maximum seat height1.75 mm
surface mountYES
Terminal surfaceMatte Tin (Sn)
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width3.9 mm
LT1579
300mA Dual Input Smart
Battery Backup Regulator
FEATURES
s
s
s
s
s
s
s
s
s
s
s
s
s
DESCRIPTION
The LT
®
1579 is a dual input, single output, low dropout
regulator. This device is designed to provide an
uninterruptible output voltage from two independent input
voltage sources on a priority basis. All of the circuitry
needed to switch smoothly and automatically between
inputs is incorporated.
The LT1579 can supply 300mA of output current from
either input at a dropout voltage of 0.4V. Quiescent current
is 50µA, dropping to 7µA in shutdown. Two comparators
are included to monitor input voltage status. Two addi-
tional status flags indicate which input is supplying power
and provide an early warning against loss of output
regulation when both inputs are low. A secondary select
pin is provided so that the user can force the device to
switch from the primary input to the secondary input.
Internal protection circuitry includes reverse-battery pro-
tection, current limiting, thermal limiting and reverse-
current protection.
The device is available in fixed output voltages of 3V, 3.3V
and 5V, and as an adjustable device with a 1.5V reference
voltage. The LT1579 regulators are available in narrow
16-lead SO and 16-lead SSOP packages with all features,
and in SO-8 with limited features.
Maintains Output Regulation with Dual Inputs
Dropout Voltage: 0.4V
Output Current: 300mA
50µA Quiescent Current
No Protection Diodes Needed
Two Low-Battery Comparators
Status Flags Aid Power Management
Adjustable Output from 1.5V to 20V
Fixed Output Voltages: 3V, 3.3V and 5V
7µA Quiescent Current in Shutdown
Reverse-Battery Protection
Reverse Current Protection
Remove, Recharge and Replace Batteries Without
Daisy-Chained Control Outputs
Loss of Regulation
APPLICATIONS
s
s
s
Dual Battery Systems
Battery Backup Systems
Automatic Power Management for
Battery-Operated Systems
, LTC and LT are registered trademarks of Linear Technology Corporation.
TYPICAL APPLICATION
5V Dual Battery Supply
OUTPUT VOLTAGE (V) INPUT VOLTAGE (V)
Automatic Input Switching
+
5V
300mA
4.7µF
12
10
8
6
4
2
0
5.05
5.00
4.95
0
2
4
6
8 10 12 14 16 18 20
TIME (ms)
1578 TA02
+
1µF
IN1
2.7M
LBI1
1M
LT1579-5
OUT
V
IN1
I
IN1
SS
+
1µF
IN2
2.7M
LBI2
1M
SHDN
LBO1
LB02
BACKUP
DROPOUT
BIASCOMP
GND
0.01µF
1579 TA01
TO
POWER
MANAGEMENT
U
U
U
SWITCHOVER
POINT
V
IN2
= 10V
I
LOAD
= 50mA
80
I
IN2
60
40
20
0
INPUT CURRENT (mA)
1
FPGA_100 Days_Real-time Clock Design
FPGA_100 Days Journey_Real Time Clock Design.pdf...
zxopenljx FPGA/CPLD
The course is almost over and I want to find a place to practice and improve my skills
The course is about to end, and I want to participate in some social practice. Where can I do an internship? I usually have more time... Job type: Internship area: Beijing Industry: Computer software ...
lsx2002 Embedded System
avr atmega128, can't call the delay program I wrote
I wrote a delay subroutine, but it doesn't work when I call it in the main program. However, I can use it by directly taking the delay statement in the delay program to the main program. And when call...
whllieying Microchip MCU
Help: Verilog ODDR2 usage problem
As the title says, when using ODDR2, I get an error Pack:2530 - The dual data rate register "fifo_up/ODDR2_inst" failed to join an OLOGIC component as required. I need help...
kuaileqisi FPGA/CPLD
Newbie help
Can the SD card be directly connected to the GPIO port of the DSP, or does it require a special interface? Please advise...
blue35sky DSP and ARM Processors
Altium Designer 16.1.10 full version shared download
[hide]Link: [url=http://pan.baidu.com/s/1skTvzyt]http://pan.baidu.com/s/1skTvzyt[/url] Password: mw15[/hide] [b][size=4][color=#ff0000]If you have any questions, you can add QQ: 40084563 for communica...
小崇伟 PCB Design

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1283  2103  903  622  710  26  43  19  13  15 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号